(12) International Application Status Report

Received at International Bureau: 18 June 2018 (18.06.2018)

Information valid as of: 16 November 2018 (16.11.2018)

Report generated on: 18 March 2019 (18.03.2019)

(10) Publication number: (43) Publication date: (26) Publication language:
WO 2018/22604913 December 2018 (13.12.2018) Korean (KO)

(21) Application number: (22) Filing date: (25) Filing language:
PCT/KR2018/00648407 June 2018 (07.06.2018) Korean (KO)

(31) Priority number(s): (32) Priority date(s): (33) Priority status:
10-2017-0070764 (KR)07 June 2017 (07.06.2017) Priority document received (in compliance with PCT Rule 17.1)

(51) International Patent Classification:
H01L 33/40 (2010.01); H01L 33/62 (2010.01); H01L 33/14 (2010.01); H01L 33/22 (2010.01)

(71) Applicant(s):
LG INNOTEK CO., LTD. [KR/KR]; 98, Huam-ro, Jung-gu, Seoul 04637 (KR) (for all designated states)

(72) Inventor(s):
PARK, Duk Hyun; 17Fl., 98, Huam-ro, Jung-gu, Seoul 04637 (KR)
JEONG, Byung Hak; 17Fl., 98, Huam-ro, Jung-gu, Seoul 04637 (KR)

(74) Agent(s):
YOON & YANG (IP) LLC; (Samho Bldg., Daechi-dong) 4th Fl., 11, Teheran-ro 108-gil Gangnam-gu Seoul 06175 (KR)

(54) Title (EN): SEMICONDUCTOR DEVICE
(54) Title (FR): DISPOSITIF À SEMI-CONDUCTEUR
(54) Title (KO): 반도체 소자

(57) Abstract:
(EN): A semiconductor device according to the present invention comprises: a conductive substrate; a semiconductor structure disposed on the conductive substrate and comprising a first conductive-type semiconductor layer, a second conductive-type semiconductor layer, and an active layer disposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer; and a first electrode disposed on the semiconductor structure and electrically connected to the first conductive-type semiconductor layer, wherein the semiconductor structure further comprises a 1-1 conductive-type semiconductor layer between the first conductive-type semiconductor layer and the first electrode; and the top surface of the semiconductor structure comprises a flat part, on which the first electrode is disposed, and a concave-convex part surrounding the flat part, wherein a second distance, which is from the bottom surface of the semiconductor structure to the bottom surface of the concave-convex part contacting a side surface of the flat part, may be between 70% or more and 95% or less with respect to a first distance, which is from the bottom surface of the semiconductor structure to the top surface of the 1-1 conductive-type semiconductor layer. The present invention may enhance light flux by improving the current spreading phenomenon of the semiconductor device.
(FR): Un dispositif à semi-conducteur selon la présente invention comprend : un substrat conducteur; une structure semi-conductrice disposée sur le substrat conducteur et comprenant une couche semi-conductrice d'un premier type de conductivité, une couche semi-conductrice d'un second type de conductivité, et une couche active disposée entre la couche semi-conductrice d'un premier type de conductivité et la couche semi-conductrice d'un second type de conductivité, et une première électrode disposée sur la structure semi-conductrice et connectée électriquement à la couche semi-conductrice d'un premier type de conductivité, la structure semi-conductrice comprenant en outre une couche semi-conductrice de type de conductivité 1-1 entre la couche semi-conductrice d'un premier type de conductivité et la première électrode; et la surface supérieure de la structure semi-conductrice comprend une partie plate sur laquelle la première électrode est disposée, et une partie concave-convexe entourant la partie plate, une seconde distance, qui s'étend de la surface inférieure de la structure semi-conductrice à la surface inférieure de la partie concave-convexe en contact avec une surface latérale de la partie plate, peut être comprise entre 70 % ou plus et 95 % ou moins par rapport à une première distance, qui s'étend de la surface inférieure de la structure semi-conductrice à la surface supérieure de la couche semi-conductrice de type de conductivité 1-1. La présente invention peut renforcer le flux lumineux en améliorant le phénomène d'étalement d'intensité de courant du dispositif à semi-conducteur.
(KO): 본 발명에 따른 반도체소자는 도전성 기판; 상기 도전성 기판 상에 배치되며, 제1도전형 반도체층, 제2도전형 반도체층 및 상기 제1도전형 반도체층과 상기 제2도전형 반도체층 사이에 배치되는 활성층을 포함하는 반도체 구조물; 및 상기 반도체 구조물 상에 배치되며, 상기 제1도전형 반도체층과 전기적으로 연결되는 제1전극; 상기 반도체구조물은 상기 제1도전형 반도체층과 상기 제1전극 사이에 제1-1도전형 반도체층을 더 포함하고, 상기 반도체 구조물의 상면은 상기 제1전극이 배치되는 평탄부, 상기 평탄부를 감싸는 요철부를 포함하며, 상기 반도체구조물의 저면에서 상기 제1-1도전형 반도체층의 상면까지의 제1거리 대비 상기 반도체구조물의 저면에서 평탄부의 측면에 접하는 요철부의 저면까지의 제2거리가 70% 이상 내지 95% 이하일 수 있다. 본 발명은 반도체소자의 전류퍼짐현상을 개선하여 광속을 향상시킬 수 있다.

International search report:
Received at International Bureau: 12 September 2018 (12.09.2018) [KR]

International Report on Patentability (IPRP) Chapter II of the PCT:
Not available

(81) Designated States:
AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
European Patent Office (EPO) : AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR
African Intellectual Property Organization (OAPI) : BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG
African Regional Intellectual Property Organization (ARIPO) : BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW
Eurasian Patent Organization (EAPO) : AM, AZ, BY, KG, KZ, RU, TJ, TM