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1. (WO2019001926) PRE-DRIVER
Anmerkung: Text basiert auf automatischer optischer Zeichenerkennung (OCR). Verwenden Sie bitte aus rechtlichen Gründen die PDF-Version.

Claims

1. Pre-driver, characterized by comprising:

a first field effect transistor (Mpu), with a source thereof being connected to a power supply input pin (VPR) of the pre-driver, the power supply input pin being connectable to an external power supply (VPR);

a second field effect transistor (Mpd), with a drain thereof being connected to a drain of the first field effect transistor (Mpu) and being connected therewith to a first output pin (Gate) of the pre-driver, and a source of the second field effect transistor being connected to a second output pin (Srce) of the pre-driver, wherein the first field effect transistor (Mpu) and the second field effect transistor (Mpd) are controlled to switch on alternately;

a third field effect transistor (Mshort), with a source thereof being connected to ground;

a reverse protection circuit (M reverse, 30), located between the second output pin (Srce) and a drain of the third field effect transistor (Mshort), and used for preventing current flow from the ground to the second output pin (Srce); and

a first control circuit (20), connected to a gate of the third field effect transistor (Mshort) and to the first output pin (Gate), and used for causing the third field effect transistor (Mshort) to be in an OFF state when a control signal from the outside (Cfg_LS) indicates that the pre-driver is used as a high-side driver or when the control signal (Cfg_LS) indicates that the pre-driver is used as a low-side driver and a voltage of the first output pin (Gate) is greater than a voltage threshold, and for causing the third field effect transistor (Mshort) to be in an ON state when the control signal (Cfg_LS) indicates that the pre-driver is used as a low-side driver and a voltage of the first output pin is not greater than the voltage threshold.

2. Pre-driver according to Claim 1, characterized in that

the source of the first field effect transistor (Mpu) is also connected to a third output pin (Btst) of the pre-driver, and

the first control circuit (20) is also used for causing the third field effect transistor (Mshort) to be in an OFF state when the control signal (Cfg_LS) indicates that the pre-driver is used as a low-side driver and a voltage of the first output pin (Gate) or a voltage of the third output pin (Btst) is greater than the voltage threshold.

3. Pre-driver according to Claim 2, characterized in that the first control circuit (20) comprises:

a voltage drop circuit (22), with one end thereof being connected to the first output pin (Gate) and the third output pin (Btst);

a fourth field effect transistor (Mcfg), with a drain thereof being connected to another end of the voltage drop circuit (22), and a gate of the fourth field effect transistor being supplied with the control signal (Cfg_LS), wherein the control signal (Cfg_LS) is HIGH when the control signal (Cfg_LS) indicates that the pre-driver is used as a low-side driver, and the control signal (Cfg_LS) is LOW when the control signal (Cfg_LS) indicates that the pre-driver is used as a high-side driver;

a fifth field effect transistor (Mc), with a gate, a drain and a source thereof being connected to a source of the fourth field effect transistor (Mcfg), a first current source (II) and ground (GND) respectively, and a first resistance (R2) being connected between the gate and the source of the fifth field effect transistor (Mc); and

an AND gate (AND), with one input end thereof being connected to the drain of the fifth field effect transistor (Mc), another input end of the AND gate being supplied with the control signal (Cfg_LS), and an output end of the AND gate being connected to the gate of the third field effect transistor (Mshort).

4. Pre-driver according to Claim 3, characterized in that the voltage drop circuit (22) comprises:

a first diode (D3), with an anode thereof being connected to the first output pin (Gate);

a second diode (D2), with an anode thereof being connected to the third output pin (Btst); and

at least one series-connected Zener diode (Zl, Z2), connected between respective cathodes of the first diode (D3) and the second diode (D2) and the drain of the fourth field effect transistor (Mcfg).

5. Pre-driver according to any one of Claims 1 - 4, characterized in that the reverse protection circuit comprises:

a sixth field effect transistor (Mreverse), with a source and a drain thereof being connected to the second output pin (Srce) and the drain of the third field effect transistor (Mshort) respectively; and

a second control circuit (30), connected to a gate of the sixth field effect transistor (Mreverse), and being used for causing the sixth field effect transistor (Mreverse) to be in an ON state when the control signal (Cfg_LS) indicates that the pre-driver is used as a low-side driver, and for causing the sixth field effect transistor (Mreverse) to be in an OFF state when the control signal (Cfg_LS) indicates that the pre-driver is used as a high-side driver.

6. Pre-driver according to Claim 5, characterized in that the second control circuit (30) comprises:

a seventh field effect transistor (Ml) and an eighth field effect transistor (M2), wherein respective gates of the seventh field effect transistor (Ml) and the eighth field effect transistor (M2) are connected together and connected to a drain of the seventh field effect transistor (Ml), respective sources of the seventh field effect transistor (Ml) and the eighth field effect transistor (M2) are connected to the power supply input pin (VPR), and a drain of the eighth field effect transistor (M2) is connected to the gate of the sixth field effect transistor (Mreverse);

a ninth field effect transistor (M3), with a drain thereof being connected to the drain of the seventh field effect transistor (Ml), a source of the ninth field effect transistor being connected to a second current source (12), and a gate of the ninth field effect transistor being supplied with the control signal (Cfg_LS), wherein the control signal (Cfg_LS) is HIGH when the control signal (Cfg_LS) indicates that the

pre-driver is used as a low-side driver, and the control signal (Cfg_LS) is LOW when the control signal (Cfg_LS) indicates that the pre-driver is used as a high-side driver; and

a second resistance (Rl), connected between the gate and the source of the sixth field effect transistor (Mreverse).

7. Pre-driver according to Claim 1, characterized in that the second field effect transistor (Mpd) is a field effect transistor having an isolated N-type ring.