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1. (WO2019043206) PHASE TRANSITION THIN FILM DEVICE
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PHASE TRANSITION THIN FILM DEVICE

Field of the Invention

The present invention is related to thin film devices and methods of manufacturing thin film devices.

Background

Thin films and thin film devices are used in a wide range of technology areas including semiconductor devices, memory devices, optical devices, solar cells, and sensors. One of the main characteristics of thin films is that properties of interest, such as mechanical, electrical, optical, magnetic and elastic properties, develop within a given lattice structure or during a phase transition.

As a consequence, much attention is given to the optimization of a desired structure of a thin film device. For devices requiring the stacking of several layers, whereby the structure of the first layer impacts or influences the structure of subsequent layers (and vice versa), this optimization can be even more difficult.

For instance, in the case of crystalline substrates, a thin film will initially adopt the structure, including lattice parameter(s), of a substrate on which it is grown, before relaxing gradually towards its own crystalline structure after a few nanometers / micrometers of thickness. Typically this relaxation process results in strain, dislocations, grain boundaries, etc., which can all give rise to long range distortions throughout a thin film stack. As the thin film relaxes, its lattice parameters gradually reach those of the bulk crystal phase of the material comprised in the thin film. The lattice parameters of the thin film together with the range of defects present entirely define the complete set of physical properties of the thin film. This remains the case when the thin film finds itself in a state in which its physical properties are capable of being changed, for instance from one ferromagnetic orientation to another during the application of a magnetic field, the presence of a large concentration of electrons, a ferroelectric polarization, the response under an applied pressure or deformation, etc.

If a structural phase transition is involved in a thin film, for instance from a cubic phase to a tetragonal phase, grains and domains from both structural phases can be present in the film. In this case, the lattice parameters of all the grains in the thin film, will be close to those of the respective single crystal phases.

If a wide range of potential physical properties is desired to be achievable, methods exist to implement this partially, for instance using chemical doping. However, this is only possible in films which each have a different doping or in heterostructures/multilayers where the doping is gradually changed as a function of thickness (for instance in Sii-xGex layers).

The consequence of known thin film procedures is that a continuous range of structural parameters is not available in any thin film process. Consequently, a continuous and wide range of physical properties is not available. By "wide and continuous range", it is meant the different properties that appear within a given structural phase as a function of applied external deformation forces and any other driving forces, for example different magnetisations as a function of applied magnetic field, different carrier densities in a semiconductor inversion or accumulation layer as a function of applied electric field, different polarisations of a ferroelectric as a function of applied electric field when these are accompanied by lattice deformation changes.

Cr doped V2O3 compound is a material capable of undergoing an isostructural phase transition. In this material, there is an isostructural transition as function of temperature between two rhombohedral crystal structures similar to AI2O3 (space group -3c), as described, for example, in Jayaraman et al., Phys. Rev. B 2, 3751 (1970). In this reference, it is shown that the a-axis lattice parameter expands at the transition temperature from 4.953 A to 5.000 A while the c-axis lattice parameter, reported by Robinson, Acta Crystallogr. Sect. B 31, 1153 (1975), decreases from 14.00 A down to 13.93 A. For (Vi. xCrx)2C>3 at x=0.004 the change in lattice parameters is gradual and continuous as a function of temperature.

As the structure changes with temperature also other physical properties may change. For example, below the transition temperature, of approximately 300 K for x=0.01, the compound is a paramagnetic metal (PM) while at higher temperatures a paramagnetic insulating state (PI) is observed. This is also accompanied by a change in the optical properties in the IR range from a more reflective state to a more transparent state. This is also accompanied by a change in the elastic properties for instance the bulk modulus from 172 GPa (x=0.01) to 197 GPa (x=0.03) as reported in H. Yang et al., Phys. Rev. B 31, 5417 (1985).

The temperature dependence of the resistivity for several Cr doped V2O3 single crystals is discussed in Kuwamoto et al., Phys. Rev. B 22, 2626 (1980). This reference also illustrates two types of phase transitions present in Cr doped V2O3 compounds.

The results shown in the Kuwamoto reference are as follows. At temperatures of approximately 170 K there is a non-isostructural phase transition from a monoclinic insulating antiferromagnetic (AFI) phase to a rhombohedral paramagnetic metallic (PM) phase (IMT transition) while at temperatures around 300 K there is an isostructural phase transition towards a paramagnetic insulating (PI) phase (PM - PI, also called MIT). The resistivity change at low temperature (the IMT transition) is about seven orders of magnitude while at high temperature (the MIT transition) is about three orders of magnitude. The PM - PI transition appears in this case for a small Cr doping region around 0.6% - 1.7% and the transition temperature shifts considerably for small changes of the Cr content. The resistivity in the metallic state - for instance at 200K - gradually increases from 5 10"4 Ω cm to 3 10"2 Ω cm with increasing doping. For doping levels above 1.8% the MIT transition is no longer visible and instead, there is only a transition from the low temperature (AFI) phase to the (PI) phase with a much smaller change in resistivity of about two orders of magnitude.

Homm et al., Appl. Phys. Lett. 107, 111904 (2015) reports a series of Cr doped V203 thin films grown epitaxially on AI2O3 substrates. Typical film thickness in this case was between 50 and 100 nm. This reference shows an IMT present at low temperature, although the slope is less steep than that reported by Kuwamoto et al for single crystals. However, for the thin films in Homm et al, the MIT around room temperature is not present. In the data of this reference the room temperature resistivity in the thin films increases as the Cr doping increases.

Summary

The present invention relates to a thin film device comprising:

a substrate, a thin film layer disposed over the substrate, the thin film layer comprising a first material capable of undergoing a phase transition, a confinement layer adjacent to the thin film layer, the confinement layer having confinement layer lattice parameters comprising first and second in plane confinement layer lattice parameters and an out of plane confinement layer lattice parameter, wherein the thin film layer has transition lattice parameters comprising first and second in-plane thin film layer lattice parameters and an out of plane thin film layer lattice parameter when undergoing the phase transition, wherein the confinement layer lattice parameters are within a pinning range which allows to control the onset of the phase transition and/or which allow blocking the phase transition.

The thin film device may comprise a control drive means for controlled inducing changes in the lattice parameter.

The present invention also relates to a thin film device comprising :

a substrate, a thin film layer disposed over the substrate, the thin film layer comprising a first material capable of undergoing a phase transition, a confinement layer adjacent to the thin film layer, the confinement layer having confinement layer lattice parameters comprising first and second in plane confinement layer lattice parameters and an out of plane confinement layer lattice parameter, wherein the thin film layer has transition lattice parameters comprising first and second in-plane thin film layer lattice parameters and an out of plane thin film layer lattice parameter when undergoing the phase transition,

the thin film device further comprising a control drive means for controlled inducing changes in the lattice parameters.

In any of the above described thin film devices, the control drive means may be a means for influencing the structural properties by means of a drive mechanism based on one or more of electrical, magnetic, optical, polar, dipolar, pressure, ordering, adhesion, reaction, elastic, phononic, thermal, transformation, diffusion, migration, chemical, electrochemical, thermal expansion properties.

The phase transition may be a non-isostructural phase transition associated with a first stable state and a second stable state, wherein the first material in the first stable state close to the phase transition has a first set of bulk lattice parameters, wherein the first material in the second stable state close to the phase transition has a second set of bulk lattice parameters, and wherein the pinning range includes the first set of bulk lattice parameters and the second set of bulk lattice parameters. The transition lattice parameters may be the first set of bulk lattice parameters.

The transition lattice parameters may be the second set of bulk lattice parameters.

The thin film layer may comprise BaTiC>3.

The confinement layer may be a buffer layer disposed between the thin film layer and the substrate.

The confinement layer may be a buffer layer disposed between the thin film layer and the substrate, the buffer layer having a buffer layer lattice parameters,

wherein the thin film material being made of a first material has thin film layer lattice parameters, the thin film layer lattice parameter is substantially equal to the buffer layer lattice parameter;

wherein first material is a material which is capable of undergoing an isostructural or non-isostructural phase transition in a bulk phase associated with a first state and a second state, wherein the first stable state has a first state lattice parameter, wherein the second stable state has a second state lattice parameter, and

wherein the thin film layer is capable of undergoing an isostructural or non-isostructural phase transition with a lattice parameter that is controllable between at least the first state having a first lattice parameter and a second state having a second, different lattice parameter, wherein at least one of the first lattice parameter and the second lattice parameter is different to the first state lattice parameter and the second state lattice parameter.

At least one of the first lattice parameter and the second lattice parameter may be less than the first state lattice parameter and the second state lattice parameter.

At least one of the first lattice parameter and the second lattice parameter may be greater than the first state lattice parameter and the second state lattice parameter.

The buffer layer may be a first buffer layer and the thin film layer may be a first thin film layer, wherein the first buffer layer extends over a first region of the substrate, the device further comprising a second buffer layer disposed on the substrate, the second buffer layer extending over a second region of the substrate which is different to the first region of the substrate, the second buffer layer

comprising a third material, the second buffer layer having a second buffer layer lattice parameter, a second thin film layer disposed on the second buffer layer, the second thin film layer comprising a fourth material, the second thin film layer having a second thin film layer lattice parameter, wherein the second thin film layer lattice parameter is substantially equal to the second buffer layer lattice parameter, and

wherein the fourth material is a material which is capable of undergoing an isostructural or non-isostructural phase transition in a bulk phase,

wherein the isostructural or non-isostructural phase transition in the thin film layer is controllable; and

wherein the second thin film layer lattice parameter is not equal to the first thin film layer lattice parameter.

The confinement layer may be a buffer layer disposed on at least a portion of the substrate, the buffer layer comprising a fifth material, the buffer layer having a buffer layer lattice parameter, wherein the thin film material is being made of a sixth material and has thin film layer lattice parameters,

the thin film layer lattice parameter is substantially equal to the buffer layer lattice parameter;

wherein the sixth material is a material which is not capable of undergoing an isostructural or non-isostructural phase transition in a bulk phase, and

wherein the thin film layer is capable of controllably undergoing an isostructural or non-isostructural phase transition.

The buffer layer may be a third buffer layer and the thin film layer is a third thin film layer, wherein the third buffer layer extends over a third region of the substrate, the device further comprising a fourth buffer layer disposed on the substrate, the fourth buffer layer extending over a fourth region of the substrate which is different to the third region of the substrate, the fourth buffer layer comprising a seventh material, the fourth buffer layer having a fourth buffer layer lattice parameter, a fourth thin film layer disposed on the fourth buffer layer, the fourth thin film layer comprising an eighth material, the fourth thin film layer having a fourth thin film layer lattice parameter, wherein the fourth thin film layer lattice parameter is substantially equal to the fourth buffer layer lattice parameter,

wherein the eighth material is a material which is not capable of undergoing an isostructural or non-isostructural phase transition in a bulk phase,

wherein the fourth thin film layer is capable of undergoing an isostructural or non-isostructural phase transition, and

wherein the fourth thin film layer lattice parameter is not equal to the third thin film layer lattice parameter.

The thin film layer may be disposed between the confinement layer and the substrate.

The thin film layer may have a first face adjacent to the substrate and in the plane of the substrate and a second face opposite the first face, wherein the confinement layer is disposed on the second face.

The confinement layer may be disposed next to at least one out-of-plane face of the thin film layer. The confinement layer may comprise (Cri-yFey)2C>3 and y takes a value between 0 and 1.

The confinement layer may comprise (Cri-yTiy)2C>3 and y takes a value between 0 and 1.

The substrate may comprise aluminum oxide.

The thin film layer may be doped.

The thin film layer may comprise vanadium (III) oxide.

The thin film layer may comprise chromium-doped vanadium (III) oxide, Cr doped V2O3.

The thin film layer may be additionally doped with titanium.

The thin film layer may be additionally doped with oxygen.

Thin film layer may have a thin film layer thermal expansion coefficient, wherein the confinement layer may have a confinement layer thermal expansion coefficient, and wherein the thin film layer thermal expansion coefficient is substantially larger or substantially smaller, than the confinement layer thermal expansion coefficient.

The thin film may comprise a first thin film sub-layer, a second thin film sub-layer and a third thin-film sub layer, wherein the second thin film layer is between the first thin film layer and the third thin film layer and wherein the second thin film layer comprises a material capable of undergoing a phase transition.

The first thin film layer may comprise silicon.

The second thin film layer may comprise germanium.

The present invention in one aspect also relates to an electronic device comprising a thin film device as described above, the electronic device being any of an integrated circuit, a pressure sensor, a memory device, a surface acoustic wave device, a radio frequency device, a resonant device, a biochemical sensor or a MEMS device.

The present invention in one aspect also relates to the use of a thin film device as described above as a composite substrate for a further thin film layer.

The further thin film layer may comprises a ninth material, the ninth material having a ninth bulk lattice parameter and the thin film layer or the thin film device as described above may comprise thin film layer lattice parameters matching the ninth bulk lattice parameter.

In yet another aspect, the present invention relates to a method of manufacturing a thin film device, the method comprising

providing a substrate,

providing a thin film layer, the thin film layer comprising a material capable of undergoing a phase transition,

providing a confinement layer,

wherein the confinement layer at least partially counteracts a thermal and/or lattice mismatch between the substrate and the thin film layer and/or wherein the confinement layer at least partially pins or blocks the onset of the phase transition.

The method may comprise providing a control drive means for controlled inducing changes in the lattice parameter.

In another aspect, the present invention relates to a method method of manufacturing a thin film device, the method comprising

providing a substrate,

providing a thin film layer, the thin film layer comprising a material capable of undergoing a phase transition,

providing a confinement layer, and

providing a control drive means for controlled inducing changes in the lattice parameter.

In any of the methods described above, the method may comprise providing a control drive means by applying lithography and/or contact layers.

The phase transition may be an isostructural phase transition.

The phase transition may be a non-isostructural phase transition.

According to another aspect of the present invention, there is provided a thin film device comprising a thin film layer disposed over a buffer layer, wherein the buffer layer is used to constrain an in-plane lattice parameter of the thin film layer.

According to another aspect of the present invention there is provided a thin film device comprising: a substrate; a thin film layer disposed over the substrate, the thin film layer comprising a first material capable of undergoing a phase transition; a confinement layer adjacent to the thin film layer, the confinement layer having lattice parameters comprising first and second in plane confinement layer lattice parameters and an out of plane confinement layer lattice parameter; wherein the thin film layer has transition lattice parameters comprising first and second in— plane thin film layer lattice parameters and an out of plane thin film layer lattice parameter when undergoing the phase transition; wherein the confinement layer lattice parameters are within a pinning range which allows to control the onset of the phase transition.

The thin film device further may comprise a control drive means for controlled inducing changes in the lattice parameters. In any of the above described thin film devices, the control drive means may be a means for influencing the structural properties by means of a drive mechanism based on one or more of electrical, magnetic, optical, polar, dipolar, pressure, ordering, adhesion, reaction, elastic, phononic, thermal, transformation, diffusion, migration, chemical, electrochemical, thermal expansion properties.

The phase transition may be associated with a first stable state and a second stable state, wherein the first material in the first stable state close to the phase transition has a first set of bulk lattice parameters, wherein the first material in the second stable state close to the phase transition has a second set of bulk lattice parameters, and wherein the pinning range includes the first set of bulk lattice parameters and the second set of bulk lattice parameters.

The transition lattice parameters may be the first set of bulk lattice parameters. The transition lattice parameters may be the second set of bulk lattice parameters.

The thin film layer may comprise BaTiC>3.

The confinement layer may be disposed between the thin film layer and the substrate.

The confinement layer can be wrapped all around the thin film layer in any 3D configuration, including on top of the thin film layer.

The thin film layer may be disposed between the confinement layer and the substrate.

The confinement layer may be disposed next to at least one out-of-plane face of the thin film layer. The thin film layer may have a first face adjacent to the substrate and in the plane of the substrate and a second face opposite the first face, wherein the confinement layer is disposed on the second face.

The thin film layer may have a thin film layer thermal expansion coefficient, the confinement layer may have a confinement layer thermal expansion coefficient, and the thin film layer thermal expansion coefficient may be substantially larger or substantially smaller than the confinement layer thermal expansion coefficient.

According to yet another aspect of the present invention there is provided an integrated circuit including a device as described above in any other aspect.

According to still another aspect of the present invention there is provided a pressure sensor including a device according to any other aspect.

According to yet another aspect of the present invention there is provided a memory device including a device according to devices disclosed in the other aspects.

According to still another aspect of the present invention there is provided a thin film device comprising: a first thin film layer; a second thin film layer; a third thin film layer; wherein the second thin film layer is between the first thin film layer and the third thin film layer; wherein the second thin film layer comprises a material capable of undergoing a phase transition. The first thin film layer may comprise silicon. The second thin film layer may comprise germanium.

According to yet another aspect of the present invention there is provided a method of manufacturing a thin film device, the method comprising: providing a substrate; forming a second layer on the substrate, the second layer comprising a material capable of undergoing a non-isostructural phase transition; forming a third layer on the second layer; wherein the second layer at least partially counteracts or enhances a thermal and/or lattice mismatch between the substrate and the third layer. The phase transition may be a non-isostructural phase transition. The phase transition may be an isostructural phase transition.

According to one aspect of the present invention, there is provided a thin film device comprising a thin film layer disposed over a buffer layer, wherein the buffer layer is used to control a lattice parameter of the thin film layer. The lattice parameter may be an in-plane lattice parameter and/or an out-of-plane lattice parameter.

It is an advantage of the present invention that it is possible to stabilize, even in relatively thick films, a wide and continuous range of structural states, each with different lattice parameters, within the same space group. This is in contrast with the case of materials that display non-isostructural phase transitions, for which thin films quickly display the lattice parameters of the corresponding bulk phases and there is no wide and continuous range of lattice parameters available. Without wishing to be bound by theory, it is thought that this may be because the local symmetry and space group between two phases participating in a non-isostructural transition are different. This can include states of matter that are between the two states between which the isostructural phase transition takes place, and that are normally not accessible in a stable manner.

According to another aspect of the present invention, there is provided a thin film device comprising: a substrate; a buffer layer disposed on at least a portion of the substrate, the buffer layer comprising a first material, the buffer layer having a buffer layer lattice parameter; a thin film layer disposed on the buffer layer, the thin film layer comprising a second material, the thin film layer having a thin film layer lattice parameter; wherein the thin film layer lattice parameter is substantially equal to the buffer layer lattice parameter; wherein the second material is a material which is capable of undergoing an isostructural phase transition in a bulk phase associated with a first stable state and a second stable state, wherein the first stable state has a first state lattice parameter, wherein the second stable state has a second state lattice parameter; and wherein the thin film layer is capable of undergoing an isostructural phase transition with a lattice parameter that is controllable between at least a first state having a first lattice parameter and a second state having a second, different lattice parameter, wherein at least one of the first lattice parameter and the second lattice parameter is different to the first state lattice parameter and the second state lattice parameter.

The thin film device further may comprise a control drive means for controlled inducing changes in the lattice parameters. In any of the above described thin film devices, the control drive means may be a means for influencing the structural properties by means of a drive mechanism based on one or more of electrical, magnetic, optical, polar, dipolar, pressure, ordering, adhesion, reaction, elastic, phononic, thermal, transformation, diffusion, migration, chemical, electrochemical, thermal expansion properties.

The thin film layer lattice parameter may take a value between the first state lattice parameter and the second state lattice parameter. The thin film layer lattice parameter may be less than the first state lattice parameter and the second state lattice parameter. The thin film layer lattice parameter may be greater than the first state lattice parameter and the second bulk lattice parameter.

The first stable state may be a paramagnetic metallic state and the second stable state may be a paramagnetic insulator state.

The substrate may comprise aluminum oxide. The buffer layer may comprise (Cri-yFey)2C>3 and y may take a value between 0 and 1. The thin film layer may comprise vanadium (III) oxide. The thin film layer may comprise chromium-doped vanadium (III) oxide, Cr-doped V2O3. The buffer layer may comprise (Cri-yTiy)2C>3 any y make take a value between 0 and 1.

The thin film layer may be doped. The thin film layer may be additionally doped with titanium. The thin film layer may be additionally doped with oxygen.

The buffer layer may be a first buffer layer and the thin film layer may be a first thin film layer, wherein the first buffer layer extends over a first region of the substrate, and the device may further comprise: a second buffer layer disposed on the substrate, the second buffer layer extending over a second region of the substrate, which is different to the first region of the substrate, the second buffer layer comprising a third material, the second buffer layer having a second buffer layer lattice parameter; a second thin film layer disposed on the second buffer layer, the second thin film layer comprising a fourth material, the second thin film layer having a second thin film layer lattice parameter; wherein the second thin film layer lattice parameter is substantially equal to the second buffer layer lattice parameter; wherein the fourth material is a material which is capable of undergoing an isostructural phase transition in a bulk phase; wherein the second thin film layer lattice parameter is not equal to the first thin film layer lattice parameter; wherein the isostructural phase transition in the second thin film layer is controllable.

According to yet another aspect of the present invention, there is provided a thin film device comprising: a substrate; a buffer layer disposed on at least a portion of the substrate, the buffer layer comprising a fifth material, the buffer layer having a buffer layer lattice parameter; a thin film layer disposed on the buffer layer, the thin film layer comprising a sixth material, the thin film layer having a thin film layer lattice parameter; wherein the thin film layer lattice parameter is substantially equal to the buffer layer lattice parameter; wherein the sixth material is a material which is not capable of undergoing an isostructural phase transition in a bulk phase; wherein the thin film layer is capable of controllably undergoing an isostructural phase transition.

The buffer layer may be a third buffer layer and the thin film layer may be a third thin film layer, wherein the third buffer layer extends over a third region of the substrate, and the device may further comprise: a fourth buffer layer disposed on the substrate, the fourth buffer layer extending over a fourth region of the substrate, which is different to the third region of the substrate, the fourth buffer layer comprising a seventh material, the fourth buffer layer having a fourth buffer layer lattice parameter; a fourth thin film layer disposed on the fourth buffer layer, the fourth thin film layer comprising an eighth material, the fourth thin film layer having a fourth thin film layer lattice parameter; wherein the fourth thin film layer lattice parameter is substantially equal to the fourth buffer layer lattice parameter; wherein the eighth material is a material which is not capable of undergoing an isostructural phase transition in a bulk phase; wherein the fourth thin film layer is capable of controllably undergoing an isostructural phase transition; wherein the fourth thin film layer lattice parameter is not equal to the third thin film layer lattice parameter.

A device according to any of the above aspects of the present invention may be used as a composite substrate for a fifth thin film layer. The fifth thin film layer may comprise a ninth material, the ninth material may have a ninth bulk lattice parameter and the thin film device thin film layer lattice parameter may be chosen so as to match the ninth bulk lattice parameter. The fifth thin film layer does not need to comprise a material capable of undergoing an isostructural phase transition, that is, the fifth thin film layer may comprise a material not capable of undergoing an isostructural phase transition in the bulk phase or in the thin film phase.

According to another aspect of the present invention, there is provided an integrated circuit including a device according to other aspects.

According to yet another aspect of the present invention, there is provided a pressure sensor including a device according to other aspects.

According to still another aspect of the present invention, there is provided a memory device including a device according to other aspects.

According to yet another aspect of the present invention, there is provided a logic device including a device according to other aspects.

According to still another aspect of the present invention, there is provided an elastic device including a device according to other aspects.

According to yet another aspect of the present invention, there is provided an acoustic device including a device according to other aspects.

The acoustic device may be a bulk acoustic wave device.

The acoustic device may be a surface acoustic wave device.

According to still another aspect of the present invention, there is provided a radio frequency ( F) device including a device according to other aspects.

According to yet another aspect of the present invention, there is provided a (bio)-chemical sensor comprising a device according to other aspects.

According to still another aspect of the present invention there is provided a MEMS device comprising a thin film device according to other aspects.

According to yet another aspect of the present invention, there is provided a method of manufacturing a thin film device comprising a thin film layer having a desired lattice parameter, the method comprising: providing a substrate; forming a buffer layer on the substrate having a lattice parameter, which is substantially equal to the desired lattice parameter; forming the thin film layer on the buffer layer.

Brief Description of the Drawings

Certain embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Fig. 1 is a plot of the temperature dependence of the a-axis and c-axis lattice constants and dielectric constant of BaTiOs;

Fig. 2a is a schematic cross section of a first thin film device according to embodiments of the present invention;

Fig. 2b is a schematic cross section of a second thin film device according to embodiments of the present invention;

Fig. 2c is a schematic cross section of a third thin film device according to embodiments of the present invention;

Fig. 3a is a plan view of a pressure sensor including a thin film device according to embodiments of the present invention;

Fig. 3b is a schematic cross section of a pressure sensor including a thin film device according to embodiments of the present invention;

Fig. 4 is a graph of energy versus thickness diagram for strain energy and dislocation energy wherein the energies required for the phase transition in 8 nm films are given by the square symbols;

Fig. 5 is a schematic cross section of a thin film device according to embodiments of the present invention wherein the confinement layer comprises a piezoelectric material;

Figs. 6a and 6b are schematic cross sections of a thin film device according to embodiments of the present invention including a control layer disposed over a first region of the thin film layer and first and second electrodes El, E2 respectively disposed on the thin film layer, for different phase states of the thin film layer;

Fig. 7 is a plan view of a device according to embodiments of the present invention including control elements and a sense electrode;

Fig. 8 is a schematic cross section of a thin film device according to embodiments of the present invention wherein control elements are disposed on more than one face of the thin film layer;

Fig. 9 is a schematic cross section of a thin film device;

Fig. 10 is a schematic perspective view illustrating lattice strain relaxing by an intermediate layer; Fig. 11 is a schematic cross section illustrating lattice strain relaxing using an intermediate layer;

Fig. 12 is a schematic cross section of a thin film device according to aspects of the present invention wherein the thin film layer comprises more than one region, each region having a particular lattice parameter;

Fig. 13 is a flow chart of a method of manufacturing a thin film device according to aspects of the present invention.

Fig. 14 is a schematic cross-section of a thin film device;

Fig. 15 is a graph showing predicted in plane lattice parameters as a function of Fe/Ti doping content for composite alloy buffer layers of (Cri-yFey)203 and (Cri-yTiy)2C>3;

Fig. 16 is a graph showing in plane lattice parameters as a function of Fe content for buffer layers of (Cri-yFey)2C>3 and thin film layers comprised in thin film devices according to embodiments of the present invention, the thin film layers comprising pure and 1.5% Cr-doped V2O3, with the bulk Cr-doped V2O3 PM and PI phase limits shown as dashed lines;

Fig. 17 is a graph showing a Reciprocal Space Map using X - Ray Diffraction of thin film devices according to embodiments of the present invention around the (1 0 1 10) reflections transformed to in-plane and out-of-plane lattice spacings of the 1.5% Cr-V2C>3 films and the different (Cri-yFey)203/Cr2C>3 heterostructures. The intensity scale is logarithmic. The PM and PI bulk lattice parameters for Cr-V2C>3 are indicated by filled and empty circles, respectively;

Fig. 18 is a graph showing Θ/2Θ X - Ray Diffraction scans around the ( 0 0 0 6 ) reflection of thin film devices according to embodiments of the invention comprising the 1.5% Cr-V2C>3 films on the different (Cri-yFey)203/Cr2C>3 heterostructures grown on AI2O3 substrates. The heterostructure with y = 0 corresponds to a single Cr2C>3 layer;

Fig. 19 is a graph showing room temperature resistivity (RT ) as a function of in-plane lattice parameter of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising pure and 1.5% Cr doped V2O3 films on buffer layers; Fig. 20 is a graph showing the temperature dependence of the resistivity over a large temperature range of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 21 is a graph showing the temperature dependence of the resistivity over a large temperature range of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising undoped doped V2O3 films on buffer layers;

Fig. 22 is a graph showing the inductance and the capacitance as a function of the film resistance at room temperature for thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers; Fig. 23 is a graph showing relative change in resistance AR/Ro (%), as a function of increasing applied force in a three-point bending test in compression of an undoped and a 1.5% Cr doped V2O3 film on buffer layer according to embodiments of the present invention;

Fig. 24 is a graph showing Fourier Transform InfraRed (FTIR) spectroscopy data as a function of energy measured at three different temperatures of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 25a is a graph showing the refractive index and the extinction coefficient as a function of energy measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 25b is a graph showing the real part of the optical conductivity as a function of energy measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers; Fig. 25c is a graph showing a low energy range of the real part of the optical conductivity as a function of energy measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 26a is a graph showing the refractive index and the extinction coefficient as a function of energy measured at room temperature of thin film devices according to embodiments of the present

invention, the thin film layers comprised in the thin film devices comprising undoped V2O3 films on buffer layers;

Fig. 26b is a graph showing the real part of the optical conductivity as a function of energy measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising undoped V2O3 films on buffer layers;

Fig. 27a is a graph showing refractive index and the extinction coefficient at a wavelength of 1550 nm as a function of thin film lattice parameter measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 27b is a graph showing refractive index and the extinction coefficient at a wavelength of 1550 nm as a function of thin film lattice parameter measured at room temperature of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising undoped V2O3 films on buffer layers;

Fig. 28 is a graph showing the relation between elastic coefficients expressed as strain relations of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising undoped as well as 1.5% Cr doped V2O3 films on buffer layers;

Fig. 29 is a graph showing the resonant frequency change with an LC or LC model based on the measured inductance and capacitance change of Fig. 22 as a function of measured resistance of thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped V2O3 films on buffer layers;

Fig. 30 is a graph showing the strong evolution of the longitudinal and lateral sound velocity as a function of Cr doping in bulk V2O3. The changes of the elastic coefficients shown in Fig. 28 will lead to similar variations of the longitudinal and lateral sound velocity in thin film devices according to embodiments of the present invention, the thin film layers comprised in the thin film devices comprising 1.5% Cr doped and undoped V2O3 films on buffer layers;

Fig. 31 is a schematic cross-section of a thin film structure according to embodiments of the present invention having layers with differing lattice parameters;

Fig. 32 is a schematic cross-section of a thin film device structure according to embodiments of the present invention having a local variation in thin film layer and buffer layer lattice parameter;

Fig. 33 is a schematic layout of a Surface Acoustic Wave (SAW) device incorporating thin film devices according to embodiments of the present invention;

Fig. 34a is a schematic cross-section of a first Micro-Electro-Mechanical System (MEMS) device in a capacitive mode comprising a thin film device according to embodiments of the present invention;

Fig. 34b is a schematic layout of a second Micro-Electro-Mechanical System (MEMS) devices in a stress mode comprising a thin film device according to embodiments of the present invention.

Detailed Description of Certain Embodiments

The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the invention.

Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.

Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing absolute positions. It is to be understood that the terms so used are interchangeable with their antonyms under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.

It is to be noticed that the term "comprising", used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression "a device comprising means A and B" should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

Similarly, it is to be noticed that the term "coupled", also used in the claims, should not be interpreted as being restricted to direct connections only. The terms "coupled" and "connected", along with their derivatives, may be used. It should be understood that these terms are not intended as synonyms for each other. Thus, the scope of the expression "a device A coupled to a device B" should not be limited to devices or systems wherein an output of device A is directly connected to an input of device B. It means that there exists a path between an output of A and an input of B which may be a path including other devices or means. "Coupled" may mean that two or more elements are

either in direct physical or electrical contact, or that two or more elements are not in direct contact with each other but yet still co-operate or interact with each other.

Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.

Similarly it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

Furthermore, while some embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.

In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

The following terms are provided solely to aid in the understanding of the invention. It will be understood that reference to "a thin film device" is reference to any of the first, second, and third thin film devices and is not intended to be limited to only one of the first, second, and third thin film devices.

Where herein a "thin film layer" is referred to without specifying whether it is a first, second, or third thin film layer it will be understood that the referred-to thin film layer can be any of the first, second, and third thin film layers. Similarly, where herein a "confinement layer" is referred to without specifying whether it is a first, second, or third confinement layer it will be understood that the referred-to confinement layer can be any of the first, second, and third confinement layers. Similarly, where herein a "thin film device" is referred to without specifying whether it is a first, second, or third thin film device, it will be understood that the referred-to thin film device can be any of the first, second, and third thin film devices.

In a first aspect, the present invention relates to a thin film device comprising a substrate and a thin film layer disposed over the substrate, the thin film layer comprising a first material capable of undergoing a phase transition. The device also comprises a confinement layer adjacent to the thin film layer, the confinement layer having confinement layer lattice parameters comprising first and second in plane confinement layer lattice parameters and an out of plane confinement layer lattice parameter. According to embodiments, the thin film layer has transition lattice parameters comprising first and second in— plane thin film layer lattice parameters and an out of plane thin film layer lattice parameter when undergoing the phase transition. The confinement layer lattice parameters are within a pinning range which allows to control the onset of the phase transition.

According to embodiments of the present invention, the temperature dependence of a phase transition can be pinned or modified and another parameter, such as stress (or any other parameter that leads to a modification of lattice parameters) can be used to continuously vary properties of a thin film layer.

By way of illustration, the present invention not being limited thereto, some features and advantages will further be described with respect to a set of exemplary embodiments. Reference is made to drawings Fig. 1 to Fig. 13.

Referring to Fig. 1, the temperature dependence of the lattice parameter and dielectric constant of BaTiC>3 is shown. BaTiC>3 is a material which is capable of undergoing a non-isostructural phase transition, that is, a phase transition between a first stable state in which the material has a first crystal structure type and a second stable state in which the material has a second crystal structure type, wherein the first crystal structure type is different to the second crystal structure type. For example, for BaTiC>3, the crystal structure changes from cubic to tetragonal (or vice versa, depending on the direction of the phase transition).

This can be seen in Fig. 1 in the discontinuous change of the c-axis (or out of plane) lattice parameter and the a-axis (or in plane) lattice parameter at the transition temperature of 120°C. The first and second states have different physical properties, as can be seen in Fig. 1 in the change of dielectric constant around the transition temperature. In this example, the first state is a ferroelectric state with a tetragonal structure (below the transition temperature) and the second state is a paraelectric state with a cubic structure (above the transition temperature).

A device including a material having two states with different physical properties can have many applications as will be described herein. However, activating a phase transition by controlling a temperature of the device can be undesirable in many applications. For example, for BaTiC>3, the transition temperature is 120°C and it may not be desirable to heat a device to these temperatures. This can also require large amounts of energy to be input and/or removed from the device, which can increase the power demands of a device. Therefore it is desired to provide devices and methods for which a phase transition can be controlled without requiring to change the temperature of the device. Referring again to Fig. 1, it can be seen that the transition from the high temperature (paraelectric) state to the low temperature (ferroelectric) state is accompanied by a change in the lattice parameters from a=b=c=401pm to a=b=400pm and c=403pm, where a and b are the in-plane lattice parameters and c is the out of plane lattice parameter. This is accompanied by a change in the dielectric constant of a factor of 5.

It is to be noted that when a phase transition occurs between two states in a non-isostructural manner, this means that there is a change in symmetry. The lattice parameters at which this change in symmetry occurs are typically different from those of the final stable states. This can for example be seen in Fig. 1. At high temperature a = b = c but at the phase transition, c is no longer equal to a = b. Intermediate states, e.g. where the symmetry is broken but where a = b = c still holds, can be obtained when using strain. It is also observed that below the transition temperature, the lattice parameters vary initially rapidly with temperature before reaching final stable values.

Referring to Fig. 2a, a first thin film device 1 according to some embodiments of the present invention comprises a substrate 2, a buffer layer, or first confinement layer, 3 and a first thin film layer 4. The substrate 2 has first and second opposite faces 5, 6. The buffer layer 3 is disposed on the first face 5 of the substrate 2 and the thin film layer 4 is disposed on the buffer layer 3. Put differently, the buffer layer 3 is between the substrate 2 and the thin film layer 4. The materials in this embodiment are provided in a stack, but alternative configurations are also possible. For example, as will be discussed hereinafter, the buffer layer may be disposed on a first portion of the substrate and not on a second portion of the substrate. One or more additional layers may be present between the buffer layer and the substrate. The thin film layer may be disposed on a first portion of the buffer layer and not disposed on a second portion of the buffer layer.

Referring to Fig. 2b, a second thin film device 1' according to embodiments of the present invention comprises a substrate 2, an overlying layer, or second confinement layer, 3' and a second thin film layer 4'. The substrate 2 has first and second opposite faces 5, 6. The second thin film layer 4' is disposed on the first face 5 of the substrate 2 and the overlying layer 3' is disposed on the second thin film layer 4'. Put differently, the second thin film layer 4' is between the substrate 2 and the overlying layer 3'. The materials in this embodiment are provided in a stack, but alternative configurations are also possible. For example, as will be discussed hereinafter, the second thin film layer 4' may be disposed on a first portion of the substrate and not on a second portion of the substrate. One or more additional layers may be present between the second thin film layer 4' and the substrate. The overlying layer may be disposed on a first portion of the second thin film layer and not disposed on a second portion of the second thin film layer.

Referring to Fig. 2c, a third thin film device 1" according to embodiments of the present invention comprises a substrate 2, an edge layer, or third confinement layer, 3" and a third thin film layer 4". The substrate 2 has first and second opposite faces 5, 6. The third thin film layer is disposed on the first face 5 of the substrate 2. The edge layer 3" is disposed on at least one out-of-plane face of the third thin film layer. An out of plane face of the thin film layer means a face which is substantially perpendicular to a plane defined by the first face 5 or the second face 6 of the substrate 2. This can allow to control an out of plane lattice parameter of the third thin film layer. Although the edge layer has been drawn as substantially perpendicular to a plane defined by the first face, the edge layer could essentially take any regular or irregular shape or be at any angle for as long as it influences substantially the out of plane lattice of the thin film.

The edge layer 3" may be disposed on all out-of-plane faces of the third thin film layer, that is, the edge layer 3" may surround the third thin film layer 4" on faces of the third thin film layer which are substantially perpendicular to a plane defined by the first face 5 or the second face 6 of the substrate 2. The edge layer 3" may be disposed on one or more faces of the third thin film layer which are parallel to the first face 5 or the second face 6. This can allow to additionally control an in plane lattice parameter of the third thin film layer.

The substrate 2 preferably is a planar crystalline substrate comprising a substrate material. The substrate 2 has first and second substrate lattice parameters in the plane of the substrate 2. The substrate 2 has a substrate thermal expansion coefficient cts. The substrate material may comprise silicon, comprise elements, alloys, binary, ternary, etc compounds such as AI2O3, Si, Ge, GaAs, AIN, GaN, InP, S1O2, SrTiC>3, etc. cut along any potential crystallographic direction.

The confinement layer comprises a confinement layer material. The confinement layer has a first crystal structure which may be any crystal structure, for example tetragonal, hexagonal, cubic, rhombohedral, orthorhombic, monoclinic, triclinic. The confinement layer has first and second in-plane confinement layer lattice parameters al, bl respectively in a plane parallel to the first face 5 or the second face 6 of the substrate 2. The confinement layer has an out of plane confinement layer lattice parameter cl. The confinement layer material may comprise one or more elements, alloys, binary, ternary, etc compounds such as Sn, (Si,Ge,Sn), CT2O3, Cr2-XAIXC>3, Cr2-xFexC>3, Cr2-xTixC>3, GaAIAs, InAIAs, GaAIN, (Ca,Sr,Ba)(Ti,Zr,Hf)03, Ca2 u04, BiNi03 etc. The confinement layer is a layer that contains "structural" properties / information that can be transmitted/conveyed to the thin film layer, as will be described herein. The confinement layer lattice parameters and crystal structure need not be the same as the lattice parameters and crystal structure of the substrate, provided that the confinement layer can be grown on the substrate (or on any intermediate layer which may be present on the substrate, for example on the second or third thin film layer).

The confinement layer can have a gradient in lattice parameters between lattice parameters at a face which is in contact with the thin film layer and lattice parameters at a face which is not in contact with the thin film layer.

In some embodiments the confinement layer may have a polycrystalline configuration provided that the confinement layer stack is able to push the lattice parameters of the thin film layer towards desired values in the pinning range.

The thin film layer 4 comprises a thin film layer material. The thin film layer material is a material which is capable of undergoing a phase transition. The phase transition may be a non-isostructural phase transition, that is, a phase transition between a first thermodynamically stable state and a second thermodynamically stable state which have a different structural space group and symmetry. However, it will be understood that the present invention is not limited only to materials capable of undergoing a non-isostructural phase transition, and any material capable of undergoing a phase transition may be comprised in the thin film layer, provided that the phase transition involves a change of lattice parameter of the material. For example, the material may be a material capable of undergoing an isostructural phase transition.

As is seen from Fig. 1, the lattice parameters of a material capable of undergoing a non-isostructural phase transition change when passing through the phase transition. Therefore, where reference is made to "thin film layer lattice parameters", it will be understood that this does not refer to one single set of values (comprising in-plane and out of plane parameters) for all uses of the term. The values of the thin film lattice parameters will be dependent upon the state of the thin film material. It is noted that the set of lattice parameters describing the structure in the plane of the thin film are not necessarily the same as those which define the crystalline unit cell.

A first set of thin film transition lattice parameters (or "first set of transition lattice parameters") is defined as the set of lattice parameters of the material comprising the thin film layer, when in the bulk crystal state, at a temperature which is below the temperature at which the non-isostructural phase transition takes place (also called the critical temperature) and is within a pinning range. It is noted that a thin film layer under strain may exhibit transition lattice parameter values that are different from the bulk phase transition lattice parameters for example within a few percent of their bulk values and these strained parameters are considered to be within the pinning range.

A second set of thin film transition lattice parameters (or "second set of transition lattice parameters") defined as the set of lattice parameters of the material comprising the thin film layer, when in the bulk crystal state, at a temperature which is above the temperature at which the non-isostructural phase transition takes place (also called the critical temperature) and is within the pinning range.

The pinning range is the range of lattice parameters of the confinement layer which allow to fix the lattice parameters of the thin film layer close to the lattice parameters corresponding to the phase transition in the bulk phase of the thin film layer material. The confinement layer has a set of confinement layer lattice parameters that are within a pinning range. By close to the lattice parameters corresponding to the phase transition in the bulk phase of the thin film layer material it is meant at a point where a significant measurable change in physical properties (for example the resistance, polarization, dielectric constant, magnetization, magnetoresistance, optical refractive index) of the thin film layer can be induced by any of the methods described herein, for example but not limited to applying stress to the thin film layer.

By fixing the lattice parameters of the confinement layer to be substantially equal to the first set of transition lattice parameters or the second set of transition lattice parameters or within the pinning range, the thin film can be "pinned" in a desired state which is a state within the pinning range. In the first thin film device 1, the buffer layer 3 helps to provide this pinning function and can also be referred to as a first confinement layer. In the second thin film device 1', the overlying layer 3' helps to provide this function and can also be referred to as a second confinement layer. In the third thin film device 1", the edge layer 3" helps to provide this function and can also be referred to as a third confinement layer.

The confinement layer lattice parameters and crystal structure need not be the same as the lattice parameters and crystal structure of the substrate, provided that the confinement layer can be grown on the substrate (or on any intermediate layer which may be present on the substrate).

The confinement layer may consist of at least two layers wherein at least one of the at least two layers functions to have lattice parameters that are close to the first or the second set of lattice parameters. The lattice parameters of the confinement layer can also be larger or smaller than the first set or the second set provided that the confinement layer functions to push the lattice parameters of the thin film layer into a desired range which allows to control the onset of the phase transition. If the pinning function is not performed then the thin film device is not stable and the thin film layer could easily undergo the phase transition in an uncontrolled manner. It is noted that pushing the values of the thin film lattice parameters outside the pinning range can also be desired in the case where metastable - or strain stabilized phase with interesting properties can be formed. It is noted that in the description of the first and second set of transition lattice parameters above, it was referred to lattice parameters taken one from a temperature above the phase transition temperature and one taken from a temperature below the phase transition temperature. However it is to be understood that the first set and second set of transition lattice parameters may be taken both from below or from above the phase transition temperature, including an additional range allowing for strain stabilized states. The confinement layer can comprise one or more layers which have a piezoelectric coefficient or a electrostriction coefficient or a piezomagnetic coefficient or a magnetostriction coefficient or optomechanical coefficient or have thermal expansion coefficient that can enable a desired change in thin film layer lattice parameters upon the application of an external parameter. The confinement layer can include one or more protection layers or isolation layers.

In some embodiments the thin film layer has a thin film layer thermal expansion coefficient (TEC) and the confinement layer has a confinement layer thermal expansion coefficient which is substantially smaller than the thin film layer thermal expansion coefficient. By substantially smaller it is meant a TEC which allows that, when the confinement layer is heated, the lattice parameters of the thin film layer are pushed towards the desired values in order to pin the lattice parameters of the thin film layer or to change the lattice parameters of the thin film layer between values in a switching configuration. In preferred embodiments the substrate has a substrate thermal expansion coefficient which is substantially different to the thin film layer thermal expansion coefficient. By substantially different is meant a TEC which allows a change in thin film lattice parameters sufficient for the thin film layer to go at least partially through its phase transition when the confinement layer is heated / cooled depending on the operational conditions. For example, the substrate may comprise silicon which has a thermal expansion coefficient of approximately 2.33 χ 10~6 C 1 and the thin film layer may comprise BaTi03 which has a thermal expansion coefficient of the order of 10 x 10"6 C 1 as can be seen from Fig. 1.

It is noted that heating from a first temperature to a second temperature following by cooling from the second temperature to the first temperature does not necessarily result in the same thin film layer state as was present before the first heating. This is because many phase transitions have a hysteresis in their behaviour. In some embodiments this can serve as a memory function which can allow to lock in a particular state of the thin film layer.

In embodiments of the present invention the lattice parameters of the thin film layer can be fixed by choosing the confinement layer lattice parameters to be within the pinning range. This can be achieved for example by varying a doping amount of the confinement layer. For example, suitable dopants may include one or more of a transition metal, nitrogen, fluorine, sulfur, carbon. This can also be achieved by a changes in composition which can be isovalent or non-isovalent. For instance where the thin film layer comprises BaTiC>3 the composition change could include any element in the (Ca, Sr,Ba)(Ti,Zr,Hf) range.

In embodiments of the present invention the phase transition can be activated by straining or bending the device 1. For example in BaTiC>3 the required change in the in-plane lattice parameters of the thin film layer material between the two stable states corresponds to a strain of 0.25% which is easily achievable in for example a membrane or cantilever device.

By pinning the thin film layer state in a state which is close to the non-isostructural or isostructural transition point, embodiments of the present invention allow to provide a device having a large change in physical properties (for example, dielectric constant as shown in Fig. 1) for a small change in lattice parameters (for example, caused by applying strain to the device or bending the device). It is noted that phase transitions exist which require a small amount of energy to activate the transition, that is, to transition between the two thermodynamically stable states. In such cases where the transition enthalpy level is not large the material may not be stable as a function of temperature. However the key advantage of embodiments of the present invention is that this transition does not occur unintentionally or spontaneously. For example, it is known in the case of BaTiC>3 that it is possible to shift the transition temperature with strain; however, the transition itself cannot be switched on or off. According to the present invention the strain imposed by the confinement layer (and optionally by the substrate) allows to controllably prevent the phase transition from occurring unless activated when desired.

In embodiments of the present invention, the thin film device 1 is comprised in any sensor which couples a deformation to a resistive, capacitive, ferroelectric, optical, magnetic response. The sensitivity of the sensor can be improved due to the large change in physical properties of the thin film layer for a relatively small deformation. For example, Silicon in piezoresistive configurations exhibits a resistivity change of a factor of two for a change of lattice parameters of about 1%.

Embodiments of the present invention allow thin film devices to be provided having thin film layers which have elastic properties which are substantially different to elastic properties of the thin film material in the bulk phase. Such thin film layers are more easily deformed which can lead to for example a decrease in the Young's modulus. In embodiments of the present invention such thin film devices could be used in oscillating systems such as a surface acoustic wave device. It is known that as materials undergo a phase transition this is accompanied by a softening of some particular phonons and thus a change in elastic properties - see for example Populoh et al., Phys. Rev. B84, 075158 (2011). However, in some embodiments the elastic properties may not be symmetric. For example, embodiments of the present invention provide a thin film device comprising a BaTiC>3 film with an in- plane lattice parameter of 4.007 A - this being in the middle of the accessible transition range of lattice parameters — then symmetric oscillations are expected. However for a thin film with a lattice parameter outside of the transition range different elastic properties can appear. This behavior can allow to provide an elastic rectifier on a chip, for instance in conjunction with surface acoustic wave devices and filters. The elastic filtering properties may be accompanied by electric, optical, and/or capacitive readout.

In many highly integrated device applications one of the main failure mechanisms is related to stress which may be one or more of electrical stress, temperature induced stress, mechanical stress. Repeatedly charging or discharging devices leads to many changes that are at the origin of several failure mechanisms. This can include local heating and cooling as well as diffusion, migration and electro-migration of species such as vacancies, interstitials, dopants, contaminants, which can all lead to changes in the local and/or global lattice parameters and therefore changes in other physical properties of the device. In embodiments of the present invention, by using a thin film layer which has a non-isostructural phase or isostructural transition within the device stack, as shown in Figure 10, the stress experienced by the top layer or the bottom layer during device operation can be minimised. In embodiments of the present invention thin film device can be used as a mechanical and/or electrical safety switch. When a mechanical force and/or deformation is provided to the material which is greater than a threshold value, the material can become metallic and thus induce a short circuit. Although some embodiments discussed herein relate to BaTiC>3, it will be understood by the skilled person that the concepts apply generally to all materials that undergo phase transitions, including piezoelectrics, pyroelectrics, manganites with colossal magnetoresistance, ferromagnets, antiferromagnets, superconductors, dielectrics, topological insulators.

In embodiments of the present invention the thin film device is comprised in a pressure sensor. In commonly used piezoresistive devices highly doped silicon is used. In operation under pressure the material is deformed which leads to a factor of two in changes of the resistivity. However, for some materials capable of undergoing a phase transition which includes a metal to insulator transition, changes up to a factor 100,000 have been reported within the elastic range of the material. Such materials may be, for example, vanadates, titanates, cuprates, nickelates, cobaltates, ruthenates, selenides, sulfites. For a review of some materials see Imada et al. Review of Modern Physics 70, 1039 (1998). This can allow a resistive pressure sensor to be provided having a sensitivity which is at least an order of magnitude greater than that of currently available sensors.

In embodiments of the present invention wherein the thin film device is comprised in a pressure sensor, a MIT layer (a layer of material capable of undergoing a phase transition between metal and insulator states) is deposited/fabricated in a thin membrane cantilever for instance in a MEMS (micro- electro-mechanical systems) device. As the membrane bends under pressure, the lattice parameters change and the resistance of the MIT layer changes as well. One embodiment of a pressure sensor according to the present invention is shown in Fig. 3a (plan view) and 3b (schematic cross section), which shows a pressure sensor having a four wire/four contact (Au) Wheatstone bridge configuration which can be used to measure a pressure difference between areas PI and P2. In this embodiment, the thin film device comprises a substrate 2, a confinement layer 3, and a thin film 4. The thin film device is held suspended on a silicon layer on top of a glass substrate and can be displaced in the vertical (z) direction, that is, perpendicular to the plane of the substrate of the thin film device. In some embodiments, an electric readout may not be possible and an optical readout may be possible by measuring the changes in the index of refraction or the extinction coefficient of the thin film (MIT) layer. One method to do this could be for instance by positioning an optical waveguide close by (next, on top, below) the thin film layer. As the pressure sensor membrane bends, the index of refraction of the thin film layer changes and this can affect properties of the light passing through nearby optical waveguides, for example the transmission, absorption, reflection, polarisation. Depending on the required sensitivity, in some embodiments the waveguide region is close to, next to, on top or below the thin film layer. However, in some embodiments, one or more substantially optically transparent layers may be provided between the thin film layer and the waveguide. Depending on the required sensitivity, the waveguide region needs to be close, next, on top or below the thin film layer.

In embodiments of the present invention a capacitive coupling may be provided. In current MEMS devices, this is typically done such that the distance between two elements is changed and the capacitance between the elements varies as the reciprocal of the distance. Since capacitance can be measured quite accurately, this enables also a good measurement of the distance between elements. In thin film layers (for example a BaTi03 layer) according to the present invention, the dielectric constant can vary between the two stable states by a factor of five or more (as can be seen in Fig. 1), much more than the variation, for instance, in piezoresistive highly doped Si sensors. This can allow to decouple deformation under pressure and/or strain from movement under pressure and/or strain. The latter mode is the typically used mode of operation in MEMS devices. Embodiments of the present invention can enable more robust pressure sensors to be provided having enhanced sensitivity as compared with sensors based only on the measurement of displacement.

The ability to generally integrate the properties of materials that undergo phase transitions enables to create a broad of novel sensors that are order of magnitude more sensitive to other properties than pressure alone such as temperature, dipole moments, charge, magnetic moments, chemicals, biomolecules.

Advantages of embodiments of the present invention may be further understood by considering the strain energy versus the energy needed to create dislocations in a thin film. The strain energy Es built up in a thin film is linearly dependent on the thickness t of the thin film according to Es = 2 G [(l+v)/(l-v)] t s2, where G is shear modulus, v is Poisson's ratio, and ε2 is lattice mismatch between two lattices. Referring to Fig. 4, a graph of strain energy (the amount of energy required to change the lattice parameter of Ge by 4%) is shown as a function of the thickness of the Ge layer. The dislocation points show the energy to create a dislocation as a function of the thickness of the Ge layer. The strain and dislocation energies are calculated in this case for Ge on Si under 4% lattice mismatch ε per unit area of the film with G = 67 GPa and v = 0.28. The energies required to let the phase transition materials go through their transitions for a thickness of 8 nm is also shown by the square symbols.

The energy Ed required to create a dislocation in Ge as a function of thickness can be approximated as

where b is Burger's vector which was taken as equal to 0.399 nm in this case. This is an energy per unit length of an edge dislocation. To transform this into an energy per unit area of the film, the values are divided by 5b. For more details see for instance, Subramaniam A et al. (2003) Analysis of thin film growth using finite element method, Surface & Coatings Technology 167(2-3): 249-254.

The energy to create the dislocation as a function of film thickness is illustrated in Fig. 4. At about 8 nm thickness, it becomes energetically more favourable to introduce a dislocation than to build up strain energy; this thickness is defined as the critical thickness. In Fig. 4, the strain and defect energies are compared with the typical energies involved in the non-isostructural phase transitions mentioned above, which are calculated for the same film thickness (8 nm) per unit area and indicated by the coloured square symbols.

The phase transitions shown in Fig. 4 correspond to the cubic to tetragonal transition in BaTi03, the rhombohedral to monoclinic transition in V2O3 and the tetragonal to monoclinic transition in VO2. Clearly, from an energy point of view, it can be much more favourable to induce a phase transition than to create a dislocation. This can provide a further advantage if that transition causes the lattice parameters to be changed.

The energy scales involved in these phase transitions can be compared with those of phase change materials which can be used in memory applications. The enthalpy of crystallisation in typical phase change materials varies between 33 to 51 meV/atom. The metal insulator transition in V2O3 only require 1.5 - 3.3 meV/atom - at least a factor of ten smaller. Clearly embodiments of the present invention can have advantageous applications in electronics.

The energy needed for the MIT transition in 8nm V203 = 33 mJ/m2 can be compared to the energy needed per m2 to switch on a modern MOSFET (by creating an inversion layer in Si due to charging a gate capacitor) at IV as E = V2 C/2 = εο k / (2 tox) with the required equivalent oxide thickness tox = 0.5 nm, a dielectric constant k = 3.9 and free space permittivity εο then gives E = 9 mJ/m2. While this comparison uses unoptimised bulk values, it nevertheless clearly demonstrates the potential of using phase transitions as the source for active device elements.

As described herein there are multiple means to trigger the variation of the lattice parameters in embodiments of the present invention. In preferred embodiments control elements are used which make use of a positive or negative thermal expansion coefficient (TEC). Several compounds are known, for example those with perovskite structures and lattices "compatible" with Si which have a large negative TEC of greater than 100 x 10-6/K for example Ca2 u04 (Takenaka 2017) and Bii- xLaxNi03 (Azuma 2011). On the other hand, large positive TEC as large as +130 x 10-6/K have been measured for the framework material Ag3[Co(CN)6] (Goodwin 2008). Hence a change of 100K, which could be provided by passing a small current through electrodes made of such materials, could already induce lattice compression or expansion of greater than 1%. It is noted that this is entirely feasible and compatible with densely scaled devices as demonstrated by the PCM memory industry where materials are repeatedly heated above the crystallisation temperature, for example >150°C for the Ge2Sb2Te5 case. Heating the negative TEC control element to 150°C will also heat partially the adjacent thin film layer. For example, this thin film layer may be a BaTi03 layer that would - in bulk systems -undergo a phase transition to the cubic PE phase at 1350 °C with an increase of the a-axis by 0.4 %. However, while the required temperature is high enough, the negative TEC could actually compress the a-axis by up to 1.0%. The invention is not limited to making use of large TEC coefficients and any other mechanical deformation effect induced using external parameters can be appropriate.

The invention is not limited to the specific materials specified in the above examples. The substrate may comprise, for example, elements, alloys, binary, ternary, etc compounds such as AI2O3, Si, Ge, GaAs, AIN, GaN, InP, S1O2, SrTiC>3, etc. cut along any potential crystallographic direction. The confinement layer may comprise, for example, elements, alloys, binary, ternary, etc compounds such as Sn, (Si,Ge,Sn), Cr203, Cr2-XAIX03, Cr2-xFex03, Cr2-xTix03, GaAIAs, InAIAs, GaAIN, (Ca,Sr,Ba)(Ti,Zr,Hf)03, Ca2Ru04, BiNi03 etc. The confinement layer comprises any material which is capable of fixing, expanding, or contracting the lattice parameters of the thin film layer, so as to control the phase transition in the thin film layer without requiring the temperature of the thin film layer to be changed. The confinement layer can be chosen from the set of compounds that are piezoelectric, for example Pb(ZrTi)03, the set of compounds that have a large positive or negative thermal expansion coefficient, for example Ca2Ru04 / BiNi03. The confinement layer may be comprise a material which has a small

thermal expansion coefficient and may be provided with a specific crystal orientation so as to induce the lattice deformation.

Any material capable of undergoing a phase transition is a suitable material for the thin film layer provided that the phase transition involves a change in lattice parameter of the material. For example, the thin film layer may comprise any of the following materials: BaTiC>3, Pb(Zr,Ti)C>3, KNbC>3, SmNiC>3, LaNiC>3, La2-xSrxCu04, NbC>2, VO2, SmS, SmSe, Lai-xMnx03, Ca2Ru04, BiNiC>3, Fe2C>3, Fe304, and in general any material that is known to undergo a phase transition involving a change in the lattice parameter of the material together with strong changes in physical properties. For a review of some more materials see Imada et al. Review of Modern Physics 70, 1039 (1998).

Other material candidates may be those that are known to undergo phase transitions as a function of pressure but have not shown to undergo phase transition under ambient conditions. The lattice deformation imposed here may bring the films into a state "comparable" to that under pressure. Other material systems could be those that are close to a known PT but have not been shown to transform yet. This is similar as to the case of pure V2O3 versus the 1.5% doped V2O3 case.

The invention is not limited to layer thicknesses specified in examples herein. The confinement layer thickness may be greater than 1 nm, greater than 10 nm, greater than 50nm, greater than lOOnm, greater than 500nm, greater than lOOOnm. The confinement layer thickness may be less than 10 nm, less than 50nm, less than lOOnm, less than 500nm, less than lOOOnm. In preferred embodiments the confinement layer thickness is about 100 nm. The confinement layer thickness may be chosen so as to provide a surface (opposite to a surface which is next to the substrate) having a lattice parameter capable of pinning an overlying thin film layer to a desired lattice parameter. The thin film layer thickness may be greater than 1 nm, greater than 10 nm, greater than 50nm, greater than lOOnm, greater than 500nm, greater than lOOOnm. The thin film layer thickness may be less than 1 nm (for example the thin film layer may be a 2D film, for example a 2D monolayer having a thickness of 0.2 nm), less than 10 nm, less than 50nm, less than lOOnm, less than 500nm, less than lOOOnm. In preferred embodiments the thin film layer thickness is about 100 nm. The thin film layer thickness may be chosen so as to have a desired fixed lattice parameter. In some embodiments wherein a gradient in lattice parameters is desired in the thin film, the thin film thickness may be greater than lOOOnm (for example, if a gradient is desired for lattice parameters between the thermodynamically stable states).

The substrate thickness may be greater than 1 nm, greater than 10 nm, greater than 50nm, greater than lOOnm, greater than 500nm, greater than lOOOnm, greater than 10 μιτι, greater than 100 μιτι, greater than 1mm. The substrate layer thickness may be less than 10 nm, less than 50nm, less than lOOnm, less than 500nm, less than lOOOnm, less than 10 μιτι, less than 100 μιτι, less than 1 mm. In preferred embodiments the substrate thickness is about 100 μιτι. In some embodiments, for example wherein the device is comprised in a membrane sensor device, the substrate thickness is preferably of the order of a micrometer.

Additional layers may be present in a thin film device according to embodiments of the present invention. For example, a capping layer may be disposed over an adjacent layer which may be the first thin film layer or the third thin film layer or the overlying layer or the edge layer. The capping layer may allow to protect its adjacent layer and/or to maintain desired properties of the adjacent layer. In some embodiments, the capping layer may be an active layer, for example may be capable of reacting to a chemical applied to the capping layer by expanding and contracting, thus providing strain to the adjacent layer and providing a method of changing one or more physical properties of the adjacent layer. The capping layer may additionally or alternatively be capable of reacting to an applied electric field and/or a change in temperature. The capping layer may comprise a metal, an alloy, a biomolecule, a tissue, and may have a thickness in the range from a monolayer to several micrometer in dependence on the desired function of the capping layer.

One or more additional layers may be present between the thin film layer and the confinement layer. For example, an isolation layer may be provided between the confinement layer and the thin film layer which can help to prevent electrical short circuits. A thermal isolation layer may be provided between the thin film layer and the confinement layer. A chemical isolation layer may be provided between the thin film layer and the confinement layer which can help to prevent chemical reactions.

The invention is not limited to materials capable of undergoing a metal-insulator phase transition. The thin film layer comprises any material capable of undergoing a non-isostructural phase transition, which may include any of the following: ferroelectric; paraelectric; piezoelectric; pyroelectric; antiferroelectric; ferromagnetic; antiferromagnetic; paramagnetic; piezomagnetic; superconducting; ferroelastic; multiferroic; martensitic; topological transitions; Transitions may be related to changes in ordering, charge ordering, dipole ordering, orbital ordering, spin ordering for example those shown in materials exhibiting colossal magnetoresistance. Transitions may be related to changes in optical properties for example refractive index, polarization, Kerr effect, Pockels effect, Faraday effect. Various methods are possible to change the properties of the confinement layer and/or the thin film layer, for example co-doping which can allow to tune the resistance or dielectric properties to much higher values, which could be done by doping with any suitable compound. It is noted that doping can allow to move in the phase diagram to a region further (or closer, depending on whether the doping content is increased or decreased) from the phase transition line.

In embodiments of the present invention the confinement layer can function as an electrode or any activation element. The confinement layer could be for instance a material similar to the material of the thin film layer which is doped. For example, in embodiments where the thin film layer comprises BaTiC>3, the confinement layer may comprise BaTiC>3 which is doped with a range of elements such that it does not show ferroelectric behavior but is, for example, metallic in the case with oxygen vacancies has a piezoelectric coefficient or a specific designed thermal expansion coefficient. Any suitable dopant is envisaged and may be chosen in dependence on the material comprising the thin film layer.

Embodiments of the present invention may be comprised in a heterostructure and can allow to tune the properties of the heterostructures using the flexibility in lattice parameters that these active layers offer. For example, in one embodiment a thin ferromagnetic layer could be provided on the thin film layer and the properties of the ferromagnetic layer could be tuned using all the concepts mentioned in this disclosure. Changing the lattice parameter of the BaTi03, for example by applying bending or strain, can change those of the ferromagnet and hence one or more of the physical properties of the ferromagnetic layer, for example the magnetization, coercive field, hysteresis, magnetic orientation, exchange bias, critical temperature, anisotropy, magnetostriction.

Embodiments of the present invention can allow a broad range of materials to be grown on top of the thin film layer or the overlying layer and their properties accordingly varied. For example multiferroics can be grown. 2D materials can be grown for which the effect of the lattice parameter change may be more substantial than the effect in thin films. Instead of tuning the lattice parameter by engineering the confinement layer by changing the confinement layer morphology and/or precise chemical composition, it can be also possible to implement local structures consisting of a different material, which changes its lattice parameter significantly upon an applied external field (see Fig. 5, which illustrates a thin film device according to embodiments of the present invention wherein the confinement layer comprises a piezoelectric material. When a voltage is applied between contacts CI and C2 disposed on the confinement layer, a confinement layer lattice parameter and therefore a thin film layer lattice parameter may change leading to variations in resistivity and optical properties, changes in magnetic field for magnetostrictive and piezomagnetic materials or by temperature change (for instance pryoelectrics or materials with a high thermal expansion coefficient) or by undergoing a structural phase transition with a high volume change. This can be again a macroscopic structure with large area contacts but it can also be much smaller like nanostructure (dot, wire, flake) on the flat surface (or its negative structure) but it will allow to use this structure as a switch where the confinement layer - and any other that undergo non-isostructural phase transitions can be activated by an external influence. The potential may also be applied on the top/bottom of the device. In some embodiments, the substrate may comprise a piezoelectric material.

It will be appreciated that, although Fig. 5 exhibits a first thin film device, the concept is equally applicable to the second and third thin film devices, wherein contacts CI and C2 are disposed on the overlying layer or the edge layer.

There is a whole range of materials that could be used here such as for instance the piezo-electrics (PbZr)Ti03 or BaTiC>3 or the magnetostrictive compounds like Terfenol. Any material that is currently used in the state of the art to induce volume changes as a function of an external influence can be applied together with this idea. For materials with a negative thermal expansion, a review of possible candidates may be found in Jun Chen et al., Chem. Soc. ev. 44, 3522 (2015), some examples include ZrW208 and A2(M04)3.

The structural flexibility in thin films provided by embodiments of the present inventions allow one or more lattice parameters of the thin film to be changed as a function of carrier density in a three terminal device, for example a metal oxide semiconductor field effect transistor (MOSFET). Upon the application of a voltage, the capacitor is charged and attracts carriers that create a conducting channel which is the traditional approach. According to embodiments of the present invention it can be possible to change the dielectric constant itself as an alternative method to charge a capacitor. Similarly, polarisation, magnetisation, refractive properties, etc can all be turned on and then influence / couple to nearby layers in two or three terminal devices comprising a thin film device according to aspects of the present invention.

Embodiments of the present invention can allow elastic properties of a thin film device, in particular elastic properties of a thin film layer comprised in a thin film device, to be tailored, for example, by injecting carriers, applying voltages, and/or changing the thin film lattice around a phase transition. This can allow to a provide a device in which the elastic properties of the device can be changed as a function of applied voltage / deformation.

Embodiments of the present invention can be used in memory applications. For example, embodiments of the present invention could be used in a resistive random access memory (RRAM) device. In such devices, the memory function is often generated through the reversible creation/destruction of electrical conductive filaments. If a compound with a phase transition is used then an additional degree of freedom is available to store or change the states, whereby the lattice parameters and symmetry can be changed as well. This behaviour could be tuned to work in a digital manner (on/off) or in an analog manner. If this would happen gradually (analog) then these may be ideal materials for neuromorphic applications. This is valid for electric, magnetic as well as photonics implementations, including where gradual changing of the elastic properties can be used in electric and/or photonic implementations.

Phase transitions are often first order transitions, which can require that a significant amount of heat (energy) is provided to induce the transition. Devices according to the present invention could function as a thermal heat sink in order to keep nearby (for example, adjacent, above, below) devices cold. In piezotronic devices piezoelectric materials are used in transistor structures (B. Magdau et al, APL 107 2015). Application of a voltage to a piezoelectric stack can cause the lattice parameters to be compressed in the out of plane direction. According to embodiments of the present invention, BaTiC>3 compounds and any other that are close to a phase transition would be ideal materials to build up such devices as a replacement for the piezoelectric material and by extension all materials that have such a structural phase transition could be used in such device configurations. Note that elasticity is a 3D property and hence the application of a voltage for instance to a piezoelectric will not only change the lattice parameters in the direction of the application of the voltage but also in other directions as well.

Note that for all these electrical devices it is possible to construct the optical equivalents assuming that transparent electrodes are used. For instance using the last example, this could be used to construct piezo-optical devices.

Embodiments of the present invention can also be used for other novel device concepts such as an optical or capacitive memory elements (M. Kim et al., "A new single element phase transition memory," in Proc. 10th IEEE Conf. Nanotechnol., 2010, pp. 439-442.) where an applied electric field / carrier injection is used to switch reversible the optical properties or the capacitance of layer in a three terminal configuration.

In some embodiments a two terminal implementation is possible, for example for the BaTiC>3 cubic (PE) - tetragonal case (FE), but this can be easily generalised to any thin film device according to the present invention. In some embodiments one or more further electrodes can be included which can allow to provide a three terminal device for example in a MOSFET like structure.

Embodiments of the present invention provide a two terminal device which allows to control the state of a region of the thin film layer. Referring to Fig. 6a, a thin film device according to embodiments of the present invention includes a control layer disposed over a first region of the thin film layer and first and second electrodes El, E2 respectively disposed on the thin film layer. The control layer is located between the first and second electrodes. The control layer comprises a material which is capable of changing its lattice parameters in response to an applied current and/or voltage. For example, the control layer may comprise a piezoelectric material. The control layer may undergo thermal expansion on application of a current/voltage. When no voltage/current is applied to the control layer, the thin film layer 4 is in a metal state and current can flow between the first and second electrodes.

Referring to Fig. 6b, when a voltage or current is applied to the control layer, the lattice parameters of the control layer change and this change is propagated to the thin film layer. Thus the lattice parameters and therefore the physical properties of the thin film layer change, in this example to produce an insulating region in a region of the thin film layer which is located below the control layer. A current path in the thin film layer between electrodes El and E2 now includes an insulating region and current cannot flow.

It will be understood that for the second thin film device, the control layer may be the confinement layer. For the third thin film device, the control layer may be the confinement layer and in this case the control layer is disposed on an edge face of the thin film layer and the first and second electrodes may be, for example, on the top and bottom faces of the thin film layer or on the top face of the thin film layer and the bottom face of the substrate.

Referring to Fig. 7, a plan view of a device according to embodiments of the present invention is shown. The device includes a first control element CI disposed on a first region of the thin film layer and a second control element C2 disposed on a second region of the thin film layer. The device includes a sense electrode S disposed on the thin film layer between the first control element CI and the second control element C2. The device includes first and second electrodes El and E2 respectively, disposed on the thin film layer 4. The first control element CI is between the first electrode El and the sense electrode S. The second control element C2 is between the sense electrode S and the second control element C2.

The first control element comprises a material capable of undergoing a positive change (an increase) in lattice parameter upon application of a voltage or current or heat (for example, a material having a positive thermal expansion coefficient). The second control element comprises a material capable of undergoing a negative change (a decrease) in lattice parameter upon application of a voltage or current or heat (for example, a material having a negative thermal expansion coefficient).

When heat or voltage or current is applied to the first control element, the first control element will undergo an increase in lattice parameter and pass on this change to a region of the thin film layer which underlies the first control element. In this example, this causes the underlying region of the thin film to become more insulating. When heat or voltage or current is applied to the second control element, the second control element will undergo a decrease in lattice parameter and pass on this change to a region of the thin film layer which underlies the second control element. In this example, this causes the underlying region of the thin film to become more metallic.

A region of the thin film layer which is between the first and second control elements will then exhibit a gradient in lattice parameters and be pinned at a point between the metal and insulator states of the phase transition. Applying heat or voltage or current to one or both of the first and second control elements can allow to move the transition front (the region pinned between the metal state and the insulator state) laterally, that is, in the plane of the thin film layer in a direction between the control elements. This can allow to provide switch functionality.

The change in position of the transition front may be determined by measuring a resistance between the first and second control elements using the first and second electrodes El, E2 and/or using the sense electrode. The transition front between metal and insulator regions may be repeatedly moved laterally. The transition front may remain fixed between the first and second control elements, for example as a reflection of the hysteresis typical of a first order transition. Thus the device is capable of functioning as a memory cell having a plurality of memory bits as the transition front moves gradually in the plane of the thin film layer.

Referring to Fig. 8, control elements can be applied on more than one surface of the thin film layer. Fourth and fifth control elements C4, C5 are located on fourth and fifth regions of the thin film layer. Between the fourth and fifth regions a sixth region of the thin film layer extends in a direction perpendicular to the plane of the substrate. A sixth control element C6 is located on a top face of the sixth region. The fourth control element C4 is between the first electrode El and the sixth control element C6. The fifth control element C5 is between the second electrode E2 and the sixth control element C6. In this embodiment the fourth and fifth control elements comprise a material capable of undergoing a positive change (an increase) in lattice parameter upon application of a voltage or current or heat (for example, a material having a positive thermal expansion coefficient). The sixth control element comprises a material capable of undergoing a negative change (a decrease) in lattice parameter upon application of a voltage or current or heat (for example, a material having a negative thermal expansion coefficient). However, each control element may have a different thermal expansion coefficient which may be less than zero or equal to zero or greater than zero in any direction. Each control element could be composed of several layers each with a different thermal expansion coefficient. This can provide additional structural modulation.

The control elements can activate switching of the thin film layer between states. For example for the embodiment of Fig. 8 the sixth control element expands the in-plane lattice parameter of the thin film layer while the fourth and fifth control elements compress the out of plane lattice parameter of the thin film layer. The fourth and fifth control elements may be a single control element which wraps around the thin film layer so as to contact the edge of the thin film layer around the sixth region.

Such changes in the physical properties of the thin film layer can be measured for example by a resistivity measurement, an AC resistivity measurement, a capacitance measurement, a magnetoresistance measurement.

It will be understood that for the second and third thin film devices the control elements and/or the first and second electrodes and/or the sense electrode will be placed in relation to the thin film layer so as to achieve the same effects as shown in Figs. 7 and 8.

Embodiments of the present invention are not limited to metal/insulator transitions. For example, the thin film regions controlled as described in the preceding may be regions showing a ferroelectric, ferromagnetic, or other non-isostructural phase transition.

Embodiments of the present invention provide a material capable of undergoing a phase transition as a strain relaxing layer. Referring to Fig. 9, a thin film device 100 is shown. The thin film device 100 comprises a first thin film layer 101, a second thin film layer 102, and a third thin film layer 103. The second thin film layer is between the first thin film layer and the third thin film layer. The second thin film layer comprises a material capable of undergoing a non-isostructural phase transition.

One of the key challenges in crystalline thin film growth is to take into account the structural mismatch between the lattice parameters of a substrate and a thin film material or between different adjacent thin film materials. Given that materials also have a thermal expansion coefficient, the structural mismatch may vary with temperature (thermal mismatch).

The electronic properties of a material capable of undergoing a phase transition can change to allow the lattice to expand or to shrink depending on the mismatch experienced during the growth or during cooling. Hence such layers can be ideal to take up the function of lattice matching buffer layers to accommodate the lattice or thermal mismatch between film / substrate or different films.

For example, it may be desired to grow a single crystal layer of Ge (a = 5.658 A) on Si (a = 5.431 A). In the standard approach this can be done at the cost of introducing a whole range of dislocations, grain boundaries and other defects at the interface between the two materials. These defects may also continue to propagate within the Ge thin film. With the use of an intermediate layer capable of undergoing a phase transition in which the lattice parameters of the material change, such as a non-isostructural or isostructural phase transition, the lattice mismatch is to a large part taken up inside that intermediate layer and a gradient in lattice parameter can be build up mostly inside that intermediate layer. This principle is illustrated in Fig. 10.

Embodiments of the present invention can be used to help alleviate a thermal mismatch between materials that can appear in addition to the lattice mismatch during deposition and processing. In Fig. 10, the top layer could be Ge, while the bottom layer is Silicon. The intermediate layer is a layer that can undergo a phase transition which is accompanied by a change in a lattice parameter, for example BaTiC>3 which is capable of undergoing a non-isostructural phase transition. At the Si interface, the in plane lattice parameter is small, while at the Ge interface, the in plane lattice parameter is large. Then in order to conserve volume, the c-axis (out of plane) lattice parameter decreases from the Si layer to the Ge layer. The interface (MIT) region is where the non-isostructural jump is the largest.

This is different from known use of strain graded layers buffers as for instance in Sii-xGex. Embodiments of the present invention can allow to improve considerably the overall quality of epitaxial layers. While demonstrated here for one particular case, this principle can be widely used with all materials that show an isostructural phase transition or a non-isostructural phase transitions as long the symmetry changes in the transition are controlled along an axis perpendicular to the thin film plane used. Note also that we have illustrated this for one particular orientation but this would apply with any crystal orientation. Of course, this principle could be applied at several places inside a layer stack or device with one material or with several materials that display such transitions.

In preferred embodiments the transition in region of the second layer close to the third layer takes place as the third layer, for example a Ge layer, grows. Ge will initially grow having a similar lattice parameter to that of the second, intermediate layer at the interface with the third layer. As the thickness of the Ge layer increases grows, the thermal and lattice mismatch between the second, intermediate layer and the Ge layer can lead to an increased stress energy. Such stress energy can lead to the introduction of defects and dislocations. However, embodiments of the present invention can allow the stress to be used to expand the in-plane lattice parameters of the intermediate layer. Embodiments of the present invention can allow to provide a third layer having locally different properties. As the lattice parameter of the third layer directly follows the lattice parameter of the intermediate, or second, layer, a third can be obtained having locally varied physical properties depending on the strain relaxation state achieved with the help of the second, or intermediate, layer. For instance, different strain relaxation states could be obtained through controlling the thickness of the second layer. In embodiments wherein the second layer comprises BaTiC>3, the second layer can be doped for example with Sr, Ca, Fe, Zr, etc.

Referring to Fig. 11, in embodiments of the present invention a thin film device may comprise a plurality of thin film regions dl, d2, each thin film region having a corresponding underlying intermediate layer or confinement layer region Fel, Fe2. The thin film regions dl, d2 correspond to regions of the third layer which may comprise for example Ge. The intermediate layer or confinement layer regions Fel, Fe2 correspond to regions of the second layer which comprises a material capable of undergoing a phase transition accompanied by a change in lattice parameter. The plurality of thin film regions each have a lattice constant which is substantially equal to the lattice constant of the intermediate layer underlying that thin film region. Thus the present invention allows to provide a thin film device having locally varying physical properties. For example, intermediate layer or confinement layer regions Fel may comprise a first intermediate region material having a first lattice constant which is substantially equal to the lattice constant of material comprising the thin film region in a metal state. For example, the doping of the first intermediate region may be chosen at a value which provides the appropriate lattice constant. Intermediate or confinement layer region Fe2 may comprise a second intermediate region having a second lattice constant which is substantially equal to the lattice constant of material comprising the thin film region in an insulator state. For example, the doping of the second intermediate region may be chosen at a value which provides the appropriate lattice constant. The thin film region dl will then follow the lattice constant of the underlying intermediate or confinement region dl and be in a metal state. The thin film region d2 will follow the lattice constant of the underlying intermediate or confinement region d2 and be in an insulator state. This can provide a basis for a device structure, which can be obtained by engineering the intermediate or confinement layer.

Embodiments of the present invention allow to create a gradient in composition of the intermediate layer for instance to bring the lattice parameter close to that of the non-isostructural phase transition - or even beyond that parameter, for example larger or smaller than that parameter. The strain in the second, or intermediate, layer imposed by the first layer, which may be a substrate, can initially clamp the intermediate layer down - even if doped with elements that would enable it to have a larger lattice parameter. However, when the third layer is subsequently deposited on the second layer, the energy barrier for the intermediate layer to take up the strain induced by the third layer can become lower due to the doping in the intermediate layer, which can be due to a supersaturation effect.

Embodiments of the present invention wherein the intermediate or confinement layer provides thin film layer regions (for example as in Fig. 12) can be implemented, for example but not limited to, as one of the following: a flat intermediate or confinement layer with locally different local composition of a Ba(FexTii )C>3 intermediate or confinement layer; ii) by growing a structured or patterned intermediate or confinement layer (e.g. by growing an island, stripe, or of any kind of shape structure on top of the intermediate or confinement layer) for instance like growing locally Ba(FexTii-x)03 lines on BaTiC>3 ; iii) by removing locally the intermediate or confinement layer with any kind of shape; iv) by locally implanting different Fe content in the intermediate or confinement layer followed by an annealing to create the Ba(FexTii-x)03 desired intermediate or confinement layer.

In embodiments of the present invention any known thin film technique can be employed during or after growth of the thin film device, for example chemical mechanical polishing in order to provide flat surfaces after patterning of the intermediate layer.

In embodiments of the present invention a thin film device can be grown on a substrate, or first layer, having one or more miscut(s) which contain steps with regular spacing depending on the miscut value. The intermediate, or second, layer is grown epitaxially on the substrate and is structurally distorted around the miscut steps due to mismatching also along the vertical direction (perpendicular to the plane of the substrate). Dislocations and anti-phase boundaries may also be present. The thin film layer is subsequently grown on top of the intermediate layer, where the intermediate layer has structurally distorted areas with a regular spacing. The thin film layer adopts the regular distortions and periodic array of areas with different physical properties can be obtained.

Embodiments of the present invention provide a second layer having a varying local oxygen content. This idea can be to be realised for instance by depositing a structure (dot, wire, flake etc.) of highly reducing nature (oxygen scavenger) so that the material comprising the second layer, which may be for example BaTiC>3, can be locally reduced. This can allow the film to contain locally varied oxidation states leading to variations in the FE - PE properties.

Referring to Fig. 13, a flow chart of a method of manufacturing a thin film device is shown. The method, according to embodiments of an aspect of the present invention, comprises a first step SI of providing a substrate (or first layer, or buffer layer or confinement layer). An intermediate layer, or second layer, is formed on the substrate (S2). The intermediate layer comprises a material capable of undergoing a phase transition which is accompanied by a change in lattice parameter. A third layer is formed on the second layer (step S3).

Methods according to embodiments of the present invention can allow a thermal and/or lattice mismatch between the first layer and the third layer to be alleviated. Steps S2 and S3 may comprise any known thin film deposition process, for example chemical vapour deposition, molecular beam epitaxy, physical vapour deposition, atomic layer deposition, sputtering, laser ablation, sol-gel deposition, direct liquid injection deposition, spraying, spray painting etc.

In some embodiments a thin film layer may be grown which partially undergoes the phase transition. The confinement layer can then allow to pin that transition more and to tune it through control layers as described herein.

Modifications

It will be appreciated that many modifications may be made to the embodiments described above. For example, in the second and third thin film devices the second and third thin film layers need not be in direct contact with the substrate. In some embodiments, one or more intermediate layers are present between the substrate and the second or third thin film layers.

In the first thin film device the buffer layer need not be direct contact with the substrate. In some embodiments, one or more intermediate layers are present between the substrate and the buffer layer.

The thin film layer need not be in direct contact with the confinement layer. In some embodiments, one or more intermediate layers are present between the confinement layer and the thin film layer.

The intermediate layer(s) could be in an amorphous phase or another phase which is different to the phase of the confinement layer and/or the phase of the thin film layer, provided that enough of the desired phase is available to transfer / control the state of the thin film. For example, a thin disordered interface/intermediate layer between the confinement layer and the thin film layer may not completely block this transfer of "structural information / lattice deformation".

In some embodiments there may be a gradual relaxation between the confinement lattice parameter and the thin film lattice parameter -for example a lattice parameter variation as a function of the thickness of the thin film - but for a majority part of the thin film thickness, the present invention allows to control the thin film lattice parameter in the pinning range.

Further by way of illustration, exemplary embodiments of the present invention will further be described with reference to Fig. 3a, 3b, 5, 6a, 6b, 7, 8, 13, 14 to Fig. 34a and 34b, illustrating features and advantages of some embodiments. In the embodiments described below, the pinning layer is a buffer layer, which typically may be positioned between the substrate and the thin film layer.

According to embodiments of the present invention, the thin film layer can access lattice parameters which are different to those between which an isostructural phase transition takes place, as will be illustrated below.

Referring to Fig. 14, a thin film device 201 according to an exemplary embodiment of the invention comprises a substrate 202, a buffer layer 203 and a thin film layer 204. The buffer layer 203 is disposed on the substrate 202 and the thin film layer 204 is disposed on the buffer layer 203. Put differently, the buffer layer 203 is between the substrate 202 and the thin film layer 204. The materials in this embodiment are provided in a stack, but alternative configurations are also possible. For example, as will be discussed hereinafter, the buffer layer may be disposed on a first portion of the substrate and not on a second portion of the substrate. The buffer layer may contain modified versions of the thin film layer. One or more additional layers may be present between the buffer layer and the substrate. The thin film layer may be disposed on a first portion of the buffer layer and not disposed on a second portion of the buffer layer.

The substrate 202 preferably is a planar crystalline substrate comprising a substrate material. The substrate 202 has first and second substrate lattice parameters in the plane of the substrate 202. The substrate material may comprise AI2O3, Si, Ge, GaAs, AIN, GaN, InP, S1O2, SrTiC>3, LiNbC>3, LaTaC>3, etc. cut along any potential crystallographic direction. In some embodiments, the substrate is a polycrystalline or textured substrate. In some embodiments, the substrate may support one or more 3D structures on a surface, for example a fin structure of a finFET configuration. The substrate 202 has a first face 205 and a second, opposite face 206.

The buffer layer 203 is disposed on a first surface 205 of the substrate 202. The buffer layer 203 comprises a buffer layer material. The buffer layer 203 has a first crystal structure, which may be any crystal structure, for example tetragonal, hexagonal, cubic, rhombohedral, orthorhombic, monoclinic, triclinic. The buffer layer 203 has first and second buffer layer lattice parameters alt blt respectively, in the plane of the buffer layer 203. The buffer layer material may comprise elements, alloys, binary, ternary, etc compounds such as Sn, (Si,Ge,Sn), BaTiC>3, CriOz, Cr2-yAly03, Cr2-yFey03, Cr2-yTiyC>3, GaAIAs, InAIAs, GaAIN, (Ca,Sr, Ba)(Ti,Zr, Hf)03, LiN b03, LaTa03, etc. The buffer layer is a layer that contains "structural" properties / information that can be transmitted / conveyed to the thin film layer, as will be described herein. The buffer layer lattice parameters and crystal structure need not be the same as the lattice parameters and crystal structure of the substrate, provided that the buffer layer can be grown on the substrate (or on any intermediate layer, which may be present on the substrate). In some embodiments, the buffer layer comprises a polycrystalline layer or a textured layer. In some embodiments, the buffer layer may support one or more 3D structures on its surface. The buffer layer 203 has a first face 207 which is adjacent to the first face 205 of the substrate 202. The buffer layer 203 has a second face 208 which is opposite to the first face 207 of the buffer layer 203.

The thin film layer 204 is disposed on the buffer layer 203. The thin film layer 204 comprises a thin film layer material. The thin film layer is preferably a single crystalline layer, but in some embodiments may be a polycrystalline layer, or a textured layer. The thin film layer may support one or more 3D structures on its surface. The thin film layer 204 has a first face 209 which is adjacent to the second face 208 of the buffer layer. The thin film layer 204 has a second face 210 which is opposite to the first face 209 of the thin film layer 204. The thin film device 201 may thus have a first face 211 coinciding with the second face 206 of the substrate 202 and a second face 212 coinciding with the second face 210 of the thin film layer 204.

In some embodiments, the thin film layer material comprises a material which is capable of undergoing an isostructural phase transition in a bulk phase that is, a phase transition between a first stable state and a second stable state which have the same structural space group and symmetry. The first stable state and the second stable state differ in the size of their respective crystal structure unit cells and their respective lattice parameters, but the isostructural phase transition does not change the space group or symmetry of the respective crystal structures of the first and second stable states. For example, the first stable state may be a paramagnetic metal (PM) state and the second stable state may be a paramagnetic insulator (PI) state. This can be a first order thermodynamic transition, a second order thermodynamic transition or higher order.

In some embodiments, the thin film layer material comprises a material which is not capable of undergoing an isostructural phase transition in a bulk phase but is capable of undergoing an

isostructural phase transition as a thin film layer in devices according to embodiments of the present invention. One such material is, for example, vanadium (III) oxide V2O3. For pure V2O3, a material which is not capable of undergoing an isostructural phase transition in bulk, when grown as a thin film on AI2O3, stabilization of thin film lattice parameters at values not equal to bulk crystal lattice parameters may not be possible except for very thin layers. See, for example, L. Dillemans et al., Appl. Phys. Lett. 104,4 071902 (2014) in which it is observed that for a V203 thin film grown on Al203 (where there is a considerably large lattice mismatch), the thin film layer having a thickness down to 6 nm, there is significant relaxation of thin film lattice parameter towards the bulk lattice parameter. However, by providing appropriate buffer layers between the substrate and the thin film layer as will be described in more detail hereinafter, the isostructural transition can be induced in pure V2O3. This engineered isostructural phase transition is a phase transition between a first stable state and a second stable state which have the same structural space group and symmetry. For example, the first stable state may be a paramagnetic metal (PM) state and the second stable state may be a paramagnetic insulator (PI) state. Herein, where reference is made to first and second stable states, it will be understood that this may refer to any of i) the pair of states between which an isostructural phase transition can occur in the bulk phase of the thin film layer material; ii) the pair of states between which an isostructural phase transition can occur in the thin film material as a thin film layer, wherein such an isostructural phase transition is not possible in the bulk; iii) states having a lattice parameter within a range extending beyond the lattice parameters of the two stable states define under i) and ii) under standard atmospheric conditions. Such nonstandard conditions may correspond to different pressures, stresses (negative / positive), doping ranges, temperatures, etc. For example the states may have lattice parameters different to those at standard atmospheric conditions but still represent stable states as they correspond to local minima in the energy landscape.

The thin film layer 204 has a second crystal structure, which is the same as the first crystal structure of the buffer layer 203. The thin film layer 204 has first and second lattice parameters 02, b2, respectively, in the plane of the thin film layer 204. It is noted that the set of lattice parameters describing the structure in the plane of the thin film are not necessarily the same as those which define the crystalline unit cell, for instance a rhombohedral unit cell can be described with hexagonal lattice parameters. The first lattice parameter 02 of the thin film layer 204 is substantially equal to the first lattice parameter ¾ of the buffer layer 203. The second lattice parameter of the thin film layer 204 is substantially equal to the second lattice parameter b± of the buffer layer 203. This allows to control the structure of the thin film layer, for example allowing the structure of the thin film layer to be tuned within and / or beyond the range of lattice parameters of the first and second states. Here, "substantially equal" means that the lattice parameter of the buffer layer is close enough to the lattice parameter of the thin film layer so that the structure of the thin film layer can be controlled without substantially inducing defects in the thin film layer. For example, the thin film layer lattice parameter may be no more than 0.5% greater than the buffer layer lattice parameter and no more than 0.5% less than the buffer layer lattice parameter. However, in some embodiments, the thin film layer lattice parameter may be more than 0.5% greater than the buffer layer lattice parameter and more than 0.5% less than the buffer layer lattice parameter. Depending on the lattice mismatch between the buffer layer 203 and the thin film layer 204, the thickness of the thin film layer 204 may be tuned. For instance, for a larger lattice mismatch, the practical thickness of the thin film layer 204 may be less; for a smaller lattice mismatch, the practical thickness of the thin film layer 204 may be greater. Nevertheless, in some embodiments, the thickness of the thin film layer can be substantially smaller or substantially larger than the thickness of the buffer layer.

The first and second lattice parameters alt b± of the buffer layer 203, and the first and second lattice parameters (¾ of the thin film layer 204, may be different to lattice parameters of a bulk crystal phase of the material comprising the buffer film layer 203. The first and second lattice parameters alt b of the buffer layer 203, and the first and second lattice parameters (¾ of the thin film layer 204, may be different to lattice parameters of a bulk crystal phase of the material comprising the thin film layer 204. More specifically, the first and second lattice parameters alt b± of the buffer layer 203, and the first and second lattice parameters (¾ of the thin film layer 204, may be different to lattice parameters of the pair of states between which an isostructural phase transition can occur of the material comprising the thin film layer 204.

The thin film layer 204 may not exhibit a gradual relaxation of the lattice parameters from those lattice parameters matching those of the buffer layer 203 to lattice parameters which are the same as the lattice parameters of the pair of states between which an isostructural phase transition can occur of the material comprising the thin film layer 204. This allows a thin film layer 204 to be grown, which has lattice parameters (¾ in the plane of the thin film layer 204 that may take a range of values, which are not limited to the corresponding lattice parameters of the pair of states between which an isostructural phase transition can occur of the material comprising the thin film layer 204. Thus, by choosing an appropriate material for the buffer layer 203, the range of lattice parameters (¾ available for the thin film layer 204 is greatly increased.

For example, thin film layer material in the first stable state of the isostructural phase transition may have a first in-plane lattice parameter c/j. Thin film layer material in the second stable state of the isostructural phase transition may have a first in-plane lattice parameter a4. The first lattice parameter 02 available to a thin film layer 204 in a thin film device according to the present invention may be greater than the first lattice parameter c/j of the first state and the first lattice parameter a4 of the second state; may take a value which is between the first lattice parameter aj of the first state and the first lattice parameter a4 of the second state; may be less than the first lattice parameter aj of the first state and the first lattice parameter a4 of the second state.

Similarly, thin film layer material in the first stable state of the isostructural phase transition may have a second in-plane lattice parameter bj. Thin film layer material in the second stable state of the isostructural phase transition may have a second in-plane lattice parameter b4. The second lattice parameter available to a thin film layer 204 in a thin film device according to the present invention may be greater than the second lattice parameter bj of the first state and the second lattice parameter b4 of the second state; may take a value which is between the second lattice parameter bj of the first state and the second lattice parameter b4 of the second state; may be less than the second lattice parameter bj of the first state and the second lattice parameter b4 of the second state.

The ability to 'fix' or 'pin' or 'stabilize' the lattice parameter of the thin film layer allows to provide a thin film device comprising a thin film layer wherein the isostructural phase transition is controllable. That is, material comprising the thin film layer, when included in a thin film device according to embodiments of the present invention, will not undergo the isostructural phase transition as it would in the bulk phase for instance as a function of temperature, pressure, doping concentration etc. The isostructural phase transition in the thin film layer will either not occur at all as a function of these parameters or is substantially modified.

That is, material comprising the thin film layer, when included in a thin film device according to embodiments of the present invention, is capable of controllably undergoing or not undergoing an isostructural phase transition, using a physical property other than the temperature of the thin film layer. This can allow physical properties of the thin film layer such as optical, electric, elastic and magnetic properties to be varied by controlling for example the strain of the thin film layer, without requiring the temperature, pressure, or doping concentration of the thin film layer to be changed. This can allow to stabilize lattice parameters in a thin film layer, and also to tune the lattice parameters by selecting an appropriate buffer layer. Thus, the present invention allows thin film devices to be grown where the thin film can display a wide and continuous range of physical parameters.

In some embodiments, the buffer layer can bring the lattice parameter of the thin film to a value closer to that of the pair of states between which an isostructural phase transition can occur than that which could be achieved by providing the same thin film layer directly on the substrate. This is due to a smaller mismatch of lattice parameters and/or thermal expansion coefficient between the buffer layer and the thin film layer. The buffer layer can be engineered to extend the lattice parameter of the thin film beyond the lattice parameters of states between which an isostructural phase transition can occur.

In some embodiments, the buffer layer is engineered to accommodate a desired thermal expansion coefficient that can bring the lattice parameter of the thin film towards the lattice parameters of the pair of states between which an isostructural phase transition can occur, or in their close proximity by changing the temperature. For example, the buffer layer can be engineered by selection of specific buffer layer materials and/or doping levels. In some embodiments, the buffer layer can be engineered to include local structures comprising an additional material different to the buffer layer material, wherein the additional material is capable of undergoing a change in lattice parameter under an applied external parameter such as an electric field, magnetic field, stress, optical radiation etc., or undergoing a generic structural phase transition with a volume change.

Example

This example discusses the case of the Cr-doped V2O3 material, which is a material that is capable of undergoing an isostructural phase transition between a paramagnetic metal (PM) state and a paramagnetic insulator (PI) state in a bulk phase, which may be induced by changing the temperature of the material through a threshold value. In the bulk crystal phase, 1.5% Cr-doped V2O3 has a first lattice parameter in the PM state and a second different lattice parameter in the PI state.

As discussed hereinbefore, a metal-insulator transition in Cr-doped V2O3 may not be present around room temperature for Cr-doped V2O3 grown directly on AI2O3 substrates. Without wishing to be bound by theory, it is thought that epitaxial constraints may play an important role in the absence of the transition. Structural studies performed using high-resolution x-ray diffraction (H -X D) and high-resolution transmission electron microscopy (HR-TEM) have revealed that the films are epitaxial, crystalline and of high quality. It is thought that this strong epitaxial match and clamping may prevent the isostructural deformation associated with the PM - PI transition, which involves an in-plane lattice parameter change. On the other hand, the non-isostructural AFI - PM transition is not or much less hampered by the epitaxial clamping.

These results suggest fundamental differences between isostructural and non-isostructural phase transitions in the case of thin films. The relaxation mechanisms within solids that enable structural transitions to take place are very different for changes that primarily occur within a unit cell (atomic rearrangements and symmetry changes) compared to those where only the overall unit cell volume gradually expands or decreases. For instance, when atoms are displaced during a non-isostructural transition from for example the central position in a cubic unit cell towards an off-center position - as is the case in the ferroelectric cubic to tetragonal transition of BaTi03 - there are then three equivalent directions in which this displacement can occur. To minimize strain during such a transition, the displacement in neighbouring unit cells or domains will tend to occur along two or three of these directions, which can give rise to grain boundaries between such domains.

In the case of isostructural phase transitions, strain relaxation in the manner described above cannot occur. This is a general principle and when applied to thin films, it is sufficient to consider transitions where the in-plane lattice structure does not undergo a symmetry change. If a symmetry break would occur solely along the direction perpendicular to the thin film plane then the in-plane lattice relaxation related to the appearance of domains with an in-plane component could not occur. This suggests that - depending on the thin film orientation - there may be some non-isostructural phase transitions for which the same observations and claims can be made as for the isostructural transitions.

A series of composite alloy buffer layers can be grown on a substrate of AI2O3, with each composite alloy buffer layer having a different in-plane lattice parameter. The differing lattice parameters can be achieved by using materials with varying levels of doping for the buffer layers. For a first set of buffer layers, the buffer layer material can be varied between Cr2C>3 and Fe2C>3 by changing the value of y in the composition (Cri-yFey)2C>3. This composition has a rhombohedral crystal structure and so a single in-plane lattice parameter a is referred to. The in-plane lattice parameter for this composition varies between 4.959 A (no Fe content, y = 0) and 5.034 A (no Cr content, y = 1).

For a second set of buffer layers, the buffer layer material can be varied between Cr2C>3 and T12O3 by changing the value of y in a composition (Cri-yTiy)203. This composition has a rhombohedral crystal structure and so a single in-plane lattice parameter a is referred to. The in-plane lattice parameter for this composition varies between 4.959 A (no Ti content, y = 0) and 5.139 A (no Cr content, y = 1). Fig. 15 shows the variation of lattice parameter a with doping y for the first set of buffer layers and the second set of buffer layers materials. A range of buffer layer lattice parameters is available by varying the doping y. The lattice parameters of the pair of states between which an isostructural phase transition occur for the known transition between the PM and PI phase in bulk Cr-doped V2O3 are indicated by horizontal dashed lines.

The first set of buffer layers on an AI2O3 substrate was grown. The in-plane lattice parameter for this substrate is 4.760 A. Typically, the growth of the composite alloy buffer layer was preceded by growth of a pre-buffer layer of around 50 nm of pure Cr203. The composite alloy buffer layer was grown on the pre-buffer layer. In some embodiments, as Fe2C>3 can decompose into Fe304 under low oxygen pressure conditions, an ultra-thin 3-5 nm layer of pure Cr2C>3 can be deposited on the surface of the buffer layer. In some embodiments, this ultra-thin layer could be thinner, or thicker or not present. Two thin film layer sets were grown over composite alloy buffer layers in the first set of buffer layers. The first set of thin film layers had a thickness of approximately 70 nm and a composition of 1.5% Cr-doped V2O3. In the bulk crystal phase, 1.5% Cr-doped V2O3 has a first lattice parameter in the PM state and a second different lattice parameter in the PI state. The second set of thin film layers had a thickness of approximately 70 nm and a composition of pure V2O3. This material is a material which is not capable of undergoing an isostructural phase transition between a paramagnetic metal (PM) state and a paramagnetic insulator (PI) state in a bulk phase. A bulk PI state in pure V2O3 - similar to the PI state in 1.5% Cr doped V2O3 - is not known in V2O3 as it may require negative pressure. In the thin film phase, the thin film layer is capable of undergoing an isostructural phase transition between a PM state, having a PM state lattice parameter, and a PI state, having a PI state lattice parameter. The lattice parameter of the thin film layer may take a value which is greater than or less than the PM state lattice parameter and may take a value that is greater than or less than the PI state lattice parameter, where the PI state lattice parameter is the lattice parameter of a PI state induced in the thin film layer when comprised in a thin film device according to embodiments of the present invention. The PI state lattice parameter can be determined experimentally for instance by X-ray diffraction.

Fig. 16 shows the measured lattice parameters of the composite buffer layers and the two sets of thin film layers as a function of the doping level in the buffer layer. It is seen that the lattice parameter of the composite alloy buffer layers increases with the doping level as expected. Surprisingly, it is also seen that the lattice parameter of the first thin film layer set, for each differing composite alloy composition, is substantially the same as the lattice parameter of the underlying composite alloy buffer layer. For Fe doping levels apart from x=0 and x=0.75, the lattice parameter of the thin film layers in the first set do not relax towards either of two structural limits, that is, the first lattice parameter in the PM state or the second lattice parameter in the PI state of Cr-doped V2O3 in the bulk crystal phase. Instead, the lattice parameter of the thin film layer follows that of the underlying buffer layer. The lattice parameter of the second thin film layer set, for each differing composite alloy composition, is substantially the same as the lattice parameter of the underlying composite alloy buffer layer, and in some embodiments may have a thermal strain component after growth due to the anomalous thermal expansion coefficient of the pure and doped V2O3 materials, which differs from the linear thermal expansion behavior of the substrate and the buffer layer. It can be seen that in the 1.5% Cr-doped thin film layer set a PI structural state and intermediate structural states beyond the bulk PI state can be reached. Thus, the thin film layers can be stabilized with a lattice parameter which is not equal to the lattice parameters of the pair of states between which an isostructural phase transition occurs.

Referring also to Fig. 17, the stabilization of the thin film layer lattice parameter between and beyond the PM and PI states can be seen from the x-ray diffraction reciprocal space maps of in-plane and out-of-plane lattice, as the (1 0 0) peak moves from the PM to the PI state and beyond. Referring also to Fig. 18, this range of available lattice parameters can be seen from the x-ray diffraction scans, where the peak corresponding to the thin film layer material moves from the PM lattice parameter to the PI lattice parameter and beyond. Note that in both Fig. 17 and Fig. 18, the peak full width at half

maximum of the relevant thin film layer is essentially the same, indicating that the films are not at all a mixture of PI and PM material. This is also confirmed by transmission electron microcopy results. It is noted that detailed understanding of the abrupt change in lattice parameter between the PM and PI phases presented in the literature suggests that lattice parameter of the 1.5% Cr-doped V2O3 should either lie on the PM value or on the PI value depending on the temperature, and that pure V2O3 should be in a PM state. Note that often in first order phase transitions, the domains from one phase start to appear while domains of the other gradually disappear. Thus diffraction peaks of domains both PI and PM phases can be found over a wide temperature range in such bulk transitions in contrast to what is observed here.

It is noted that the in-plane lattice parameter of the thin film layer is substantially equal to that of the underlying buffer layer, but it may not in each case be exactly equal. For example, without wishing to be bound by theory, it is thought that there may be some strain relaxation within the buffer layer 203 during deposition of the thin film layer 204 or some changes due to thermal mismatch (i.e. different thermal expansion coefficients) between the buffer layer 203 and the thin film layer 204.

It is also seen from Fig. 16 that the in-plane lattice parameter of the thin film layer may be stabilized at a value which is greater than both the bulk phase PM state lattice parameter and the bulk phase PI state lattice parameter.

The in-plane lattice parameter of the thin film layer may also be stabilized at a value which is less than both the bulk phase PM state lattice parameter and the bulk phase PI state lattice parameter, for example with an appropriate buffer alloy, such as (Cri-XAIX)2C>3, or with a smaller mismatch between the buffer layer lattice parameter and the thin film layer lattice parameter.

These results suggest that thin film layers capable of undergoing an isostructural phase transition may have an additional flexibility to be stretched or compressed significantly beyond their states associated with the isostructural phase transition and it is thought that this may be due to the absence of symmetry breaking, which would be accompanied by the creation of domains, domain walls, grain boundaries, and/or other structural defects.

Referring to Fig. 19, the room-temperature resistivity (RTR) of the above-described pure and 1.5% Cr-doped V2O3 films on buffer layers is shown. As a function of thin film in-plane lattice parameter (which is related to doping amount in the buffer layer as shown in Fig. 16), there is a variation of more than three orders of magnitude in the room temperature resistivity (RTR) values for the 1.5 % Cr-doped V2O3 films and more than two orders of magnitude for the pure V2O3 films. Note that a further increase of RTR of pure V2O3 is expected for larger in-plane lattice parameters. The three orders of magnitude change essentially corresponds to the variation of the resistivity in bulk Cr-doped V2O3 single crystals as the single crystals pass through the PM-PI phase transition as a function of temperature. Thus, a

temperature dependent transition can be transformed into a stress / mechanical transition at a fixed temperature. This can also be seen in the temperature dependent resistivity of the Cr-doped thin films shown in Fig. 20. Note also how the Temperature Coefficient of Resistivity (TCR) - proportional to the slope of the resistivity versus temperature - can be controlled and changes from positive to negative. In addition, the lowest resistivity state of these 1.5% Cr doped V2O3 films is about a decade lower than that of bulk 1.5% Cr doped V2O3 single crystals indicating that a much better / more homogenous metallic state can be achieved in these pinned states.

The temperature dependent resistivity of the pure V2O3 is shown in Fig. 21. The two orders of magnitude range for the pure V2O3 films has no precedent in bulk; therefore, according to embodiments of the present invention, a non-existent transition with temperature in bulk can be obtained in thin films as a mechanical transition at a fixed temperature. This can allow to provide a thin film device wherein the thin film layer is capable of exhibiting a wide range of physical properties, for example resistivity, which can enable the thin film layer to act as a metal or as an insulator, by controlling the phase transition through a variable which is not the temperature of the film.

It is noted that the composite alloy buffer layers of the above-described thin film devices are insulators, with the pure CT2O3 layer being even more insulating than the pure Fe2C>3 layer. Hence, the observed electrical properties are not considered to be caused by changes in the electrical properties of the buffer layers but solely by the properties of the thin film layer.

The ac impedance properties of the different 1.5% Cr doped V2O3 layers grown on the buffers were measured using an impedance analyser. From these measurements the resistance, inductance and capacitance were extracted as shown in Fig. 22. While the extracted values are dependent on the circuit model used to extract the values, the overall trends are clear with significant changes in inductance and capacitance as a function of mechanical deformation.

In Fig. 23, the relative change in resistance AR/Ro (%) as a function of increasing applied force in a three-point bending test is shown. The applied force results in a compression of the second face 212 of the thin film device 201 where the pure and 1.5% Cr doped V2O3 films on buffer layer are deposited - y of the buffer layers are 50% and 34% respectively - and an expansion of the first face 211 of the substrate. The decrease in resistance measured in the direction of the maximum in-plane deformation evidences the piezo-resistive response of the thin film layers to a compression of the in-plane lattice parameter.

The optical properties of the two thin film layer sets were investigated with Spectroscopic Ellipsometry (SE) and Fourier Transform InfraRed spectroscopy (FTIR). Referring to Fig. 24, FTIR near-infrared optical transmission data was measured at three different temperatures (200K, 250K an 300K) of 1.5% Cr doped V2O3 films on buffer layers. While the curves shift all up as a function of temperature the overall trends remain the same for each sample. Hence there is no optical phase transition and the optical properties are also "pinned" as a function of temperature.

Next, SE measurements were performed at room temperature, within a broad energy range from 0.5eV to 5.5eV. The dispersion of the refractive index n and extinction coefficient k were obtained by first measuring SE spectra of the different layers in the heterostructure of a thin film device independently. This was achieved by measuring a substrate alone, a substrate with a Cr2C>3 buffer layer disposed on the substrate, a substrate with a Cr2C>3 layer and a composite alloy Cri-yFey)2C>3 buffer layer disposed on a substrate, and a substrate with a Cr2C>3, a composite alloy Cri-yFey)2C>3 buffer and Cr-doped (or undoped) V2O3 layer disposed on the buffer layer. In each case SE data were fitted using Tauc-Lorentz oscillators models and then combined into a complete model for the full heterostructure. Referring to Fig. 25a, the n and k values are shown for the 1.5 % Cr doped V2O3 layer as a function of photon energy. Clear changes are seen as the system evolves from the PI to the PM phase, with n varying between approximately 3.4 and 2, and k varying between approximately 0.2 and 3. These trends and values are similar to those of the metal-insulator transition in VO2.

The real part of the optical conductivity oi can be obtained from the spectral optical constants n(w) and k(oo) as Re(o (ω)) = ωε01ιη(ε(ω)) , where ω is the angular frequency, ε0 is the vacuum permittivity, and Ιιτι(ε(ω)) = 2nk is the imaginary part of the complex dielectric function ε(ω)/ε0 = Re^(oo)) - i Ιιτι(ε(ω)). Referring to Fig. 25b, oi is shown for the 1.5% Cr-V2C>3 thin film devices with different in-plane lattice parameters as described hereinbefore. The spectra of Fig. 25b show the presence of several peaks associated with different inter-band transitions. The spectral weight (SW) of the peaks shifts significantly as the films undergo the PM-PI transition. The data also reveal an isosbestic point near 2.1eV of oi ~ 900 Ω _1cm _1, indicated in Fig. 25b. This point has been known to appear when the optical conductivity curves measured at different temperatures in a phase transition cross at the same values of oi and ω, such a point being a characteristic feature of Mott transitions. Here the isosbestic point is seen where the strain, not the temperature, varies between the optical conductivity curves, suggesting that this is an equivalent approach to pass through a Mott phase transition.

Fig. 25c illustrates the low frequency range of the optical conductivity (from 4000 cm 1 to 15000 cm"1) along with the room temperature DC conductivity values (solid symbols at ω=0) as extracted from the resistivity curves of Fig. 20. The optical conductivity spectra of a pure V2O3 single crystal in the anti-ferromagnetic insulating (AFI) state at 100K, and a 1.1% Cr-V203 single crystal in the AFI (100 K), PM (200 K) and PI (300 K) states are also shown and illustrate that at the PM-PI transition in a bulk system, there is only a small shift in the SW at the lowest energies, together with the opening of the band gap of approximately 0.10 - 0.15 eV. The spectra for thin film devices according to embodiments of the present invention show a much larger shift in SW and a much larger band gap of approximately 0.5

eV. From these data, it is derived that the optical conductivity spectra of the "pinned" thin films in the PI state represent samples with a higher intrinsic quality with less inhomogeneities than the corresponding case of single crystals.

Fig. 26a shows the n and k values for the pure V2O3 layers grown on different buffer layers, according to embodiments of the present invention, as a function of photon energy, while Fig. 26b shows the optical conductivity oi of these same layers. Similar observations and conclusions apply as described for the 1.5% Cr doped V2O3 layers above.

Fig. 27a and b summarize the n and k values for a wavelength of 1550 nm - a typical wavelength used for optical communications - for the 1.5% Cr doped and undoped V2O3 layers as a function of their lattice parameter.

Typically, during a first-order phase transition with a discontinuous change in volume, elasticity is not well defined for bulk or thin film materials. According to embodiments of the present invention, intermediate "elastic" states can be created. This is shown in Fig. 28 which plots the in-plane strain e-L = ^ api^ versus the out-of-plane strain e3 = ^ Cp'^ with a and c the respective lattice aP[ cPf

parameters of the thin film layer and api and the respective lattice parameters of the PI state. For thin films under biaxial in plane stress oi = σ2 and σ3 = 0, these strain values are related through e3 = —— et and they are plotted here and compared to values based on the bulk elastic stiffness coefficients for example as found in Yang, et al., "Pressure dependence of elastic constants of (Vi-xCrx)203 at 296 K" Phys. Rev. B 31, 5417 (1985). In the tensile part, for positive et there is good agreement with the bulk elastic properties while near the MIT this ratio deviates significantly. The indicated values of oi are calculated from oi =- ει Yn /(1- V12) using Young's modulus Yu = 211 GPa and Poisson's ratio V12 = 0.16 calculated from Yang et al up to the region where the elastic properties are no longer well known for compressive oi > 0.4 GPa. The depicted non-linear stress strain relation stabilizes here, suggesting a critical elasticity and a breakdown of Hooke's law. It is noted that while often isotropic or hexagonal lattices are assumed in such calculations, the proper rhombohedral elastic coefficients should be used. This then includes coupling between normal and shear strain through the elastic constant cu. In other words, an uniaxial expansion ει induces a shear / rotation ε4

= Si4 en £i. Furthermore cu leads to the coupling of orthogonal shear rotations through e5 = e6

c44

(biaxial oi = 02 and 03 = σ4 = σ5 =0) where εε corresponds to in-plane shear. These latter relations are also shown in Fig. 28. While only experimental changes in C13/C33 are reported here, it is clear that all elastic constants - and corresponding sound velocities - are undergoing a jump and can be controlled and pinned at intermediate values between those of the pair of states at which an isostructural phase transition occurs.

The values of the lateral and longitudinal sound velocities are shown in Fig. 30 for bulk Cr-doped V2O3 single crystals as a function of Cr doping. These data give a good estimation of the range over which the sound velocities can be varied in the thin film devices made according to embodiments of the present invention. Sound velocities are one of the key parameters in the operation of Surface Acoustic Wave (SAW) and Bulk Acoustic Wave (BAW) devices.

For F devices, resonances in RLC circuits are a key property. From the extracted resistance, inductance and capacitance shown in Fig. 22, the corresponding resonance frequencies can be computed and are shown in Fig. 29. These data show how the resonance frequency varies over two orders of magnitude as a function of the resistance of the thin film layers.

Various applications and embodiments of the present invention will now be described. It will be understood that these embodiments and applications are not restricted to the use of the above described materials and other materials for the thin film layer, buffer layer, and substrate are possible, as will be described hereinafter.

In embodiments of the present invention a thin film device can function as a lattice-matching layer, or composite substrate, to accommodate the lattice or thermal mismatch between a further thin film and substrate, or between different thin films.

For example, it may be desired to grow a single crystalline layer of Fe2C>3 (in-plane lattice parameter 5.034 A) on Cr2C>3 (a = 4.959 A). In the standard approach, this can be done but at the cost of introducing a range of dislocations, grain boundaries and/or other defects at the interface between the two materials. These defects may also continue to propagate within the Fe2C>3 thin film. With the use of the Cr-doped V2O3 thin film as described hereinbefore, the lattice mismatch can be to a large part taken up inside the Cr-doped V2O3 thin film layer. Since there exists a wide range of lattice parameters available to the Cr-doped V2O3 thin film material during its isostructural phase transition - for example between a = 4.957 and a = 5.023 (see Fig. 16), a gradient in lattice parameter can be build up mostly inside the Cr-doped V2O3 thin film layer.

This principle is illustrated in Fig. 31. It is noted that these devices/methods can apply equally to alleviate the thermal mismatch between materials that can appear in addition to the lattice mismatch during deposition and processing. It is also noted that this device/method is different from the use of strain graded layers buffers - as, for example, in Sii-xGex where a gradually increasing amount of Ge is inserted.

By way of illustration, specific but similar examples (as for example given when describing Fig. 11) and embodiments for the case of isostructural phase transitions will be given.

This can allow to improve considerably the overall quality of epitaxial layers. While demonstrated here for one particular case, this principle can be widely used with all materials that show an structural phase transition as long as the symmetry changes in the transition are restricted along an axis perpendicular to the thin film plane used. Although examples herein are discussed, which have one particular crystal orientation, the invention is applicable to substrates, buffer layers, and thin films having any crystal orientation.

A thin film device according to embodiments of the present invention may be used as a composite substrate for a fifth thin film layer, that is, the fifth thin film layer may be deposited on a thin film device according to the present invention. The present invention allows to tune lattice parameters of the thin film layer of the thin film device, using methods as described herein, and this can allow to provide a thin film device thin film layer having a lattice parameter which substantially matches a lattice parameter of the fifth thin film layer. This can allow to provide a fifth thin film layer having a low lattice mismatch with the layer underlying the fifth thin film layer. For example, the fifth thin film layer may comprise a ninth material, the ninth material may have a ninth bulk lattice parameter and wherein the thin film device thin film layer lattice parameter may be chosen so as to match the ninth bulk lattice parameter. The buffer layer lattice parameter may be chosen so as to provide the desired thin film device thin film layer lattice parameter which allows the fifth thin film layer to be grown on the thin film device thin film layer without a substantial lattice mismatch. The fifth thin film layer can comprise any material, that is, the fifth thin film layer need not comprise a material capable of undergoing an isostructural phase transition in a bulk or thin film phase.

In embodiments of the present invention a thin film device can comprise a plurality of thin film layers along with corresponding buffer layers. The plurality of thin film layers may each comprise a different material capable of undergoing an isostructural phase transition. The plurality of thin film layers each have a corresponding under- or over-lying buffer layer having a buffer layer lattice constant and the corresponding thin film layers have lattice constants which are substantially equal to those of the corresponding buffer layers.

Referring to Fig. 32, in embodiments of the present invention a thin film device may comprise a plurality of thin film regions dl, d2, each thin film region having a corresponding underlying buffer layer region Fel, Fe2. The plurality of thin film regions each have a lattice constant which is substantially equal to the lattice constant of the buffer layer underlying that thin film region. Thus, the present invention allows to provide a thin film device having locally varying physical properties. For example, buffer layer regions Fel may comprise a first buffer region material having a first lattice parameter which is substantially equal to the lattice constant of material comprising the thin film region in a metallic state. For example, the doping of the first buffer region may be chosen at a value which provides the appropriate lattice parameter. Buffer layer region Fe2 may comprise a second buffer region having a second lattice constant which is substantially equal to the lattice constant of material comprising the thin film region in an insulating state. For example, the doping of the second buffer region may be chosen at a value which provides the appropriate lattice parameter. The thin film region dl will then follow the lattice constant of the underlying buffer region Fel and be in a metallic state. The thin film region d2 will follow the lattice constant of the underlying buffer region Fe2 and be in an insulating state. This can provide a basis for a device structure, which can be obtained by engineering the buffer layer. Note that this embodiment is quite similar to the one discussed for the non-isostructural case in Fig. 12, however different buffer layer materials can be used for the two different cases as described below.

Embodiments of the present invention providing a device structure having thin film regions with varying lattice constants may be manufactured in various ways. For example, in some embodiments a flat buffer layer may be grown with locally different composition (for example, locally different doping levels of a (Cri-yFey)2C>3 buffer) of the buffer layer. In some embodiments a structured or patterned buffer layer may be grown, for example by growing an island, stripe, or of any kind of shape structure within the buffer layer and providing the thin film layer on top of the patterned buffer layer, for instance by growing locally Fe2C>3 lines within a Cr2C>3 layer. In some embodiments the buffer layer may be locally removed to leave gaps having any appropriate shape. In some embodiments, different Fe content may be locally implanted in the buffer layer followed by an annealing step to create the desired (Cri-yFey)2C>3 buffer layer.

In embodiments of the present invention any known thin film technique can be employed during or after growth of the thin film device, for example chemical mechanical polishing in order to provide flat surfaces after patterning the buffer layer.

In embodiments of the present invention a thin film device can be grown on a substrate having one or more miscut(s) which contain steps with regular spacing depending on the miscut value. The buffer layer is grown epitaxially on the substrate and is structurally distorted around the miscut steps due to mismatching also along the vertical direction (perpendicular to the plane of the substrate). Dislocations and anti-phase boundaries may also be present. The thin film layer is subsequently grown on top of the buffer layer, where the buffer layer has structurally distorted areas with a regular spacing. The thin film layer adopts the regular distortions and periodic array of areas with different physical properties can be obtained. Note that with this latter procedure, the microstructure for the thin films that undergo an isostructural or a non-isostructural phase transitions will be substantially different. In the latter case the occurrence of many more domains can be observed given that those domains can appear already as the result of the phase transition.

In embodiments of the present invention the local oxygen content of the thin film layer may be varied in order to provide thin film areas having different physical properties. This can be realized, for example, by depositing a structure (for example a dot, a wire, a flake) having a highly reducing nature (being an "oxygen scavenger"), such that the oxygen content of the deposited thin film layer is locally decreased in the region of the reducing structures. This can provide locally varied oxidation states having different physical properties, for example a metallic region and an insulating region. Similar features could be induced using doping with other gaseous species such as nitrogen, hydrogen, etc. Embodiments of the present invention allow thin film devices to be provided having thin film layers that have elastic properties which are substantially different to elastic properties of the thin film material in the bulk phase. It is known that phase transitions are accompanied by a softening of some particular phonon modes and thus leading to a change in elastic properties and sound velocities in different directions Thin film layers in devices according to embodiments of the present invention can exhibit elastic properties that are significantly different from those of the two states between which the isostructural phase transition takes place, either in the bulk phase for a material capable of undergoing a bulk phase isostructural phase transition or in the thin film phase, for a material which is not capable of undergoing an isostructural phase transition in the bulk phase but is capable in the thin film phase according to embodiments of the present invention. Data that illustrate this are shown in Fig. 28 and Fig 30. In embodiments of the present invention such thin film devices could be used in oscillating systems such as a surface acoustic wave (SAW) devices.

In many highly integrated device applications one of the main failure mechanisms is related to stress which may be one or more of electrical stress, temperature induced stress, mechanical stress. Repeatedly charging or discharging devices leads to many changes that are at the origin of several failure mechanisms. This can include local heating and cooling as well as diffusion, migration and electro-migration of species such as vacancies, interstitials, dopants, contaminants, which can all lead to changes in the local and/or global lattice parameters and therefore changes in other physical properties of the device. In embodiments of the present invention, by using a thin film layer which has an isostructural phase transition within the thin film device stack, or supporting the thin film device stack for instance as the middle layer in Fig. 31, the stress experienced by the top layer or the bottom layer during device operation can be minimized. Note that using a thin film layer which has an isostructural phase transition for this embodiment is not identical to using a thin film which has a non-isostructural phase transition. In the former case, in plane and out plane lattice parameters are well coupled with the elastic limits set by the material, while in the former case, the change of symmetry and space group adds additional degrees of freedom in the strain relaxation.

In embodiments of the present invention thin film device can be used as a mechanical and/or electrical safety switch. When a mechanical force and/or deformation is provided to the material which is

greater than a threshold value, the material can become metallic and thus induce a short circuit. This is seen in devices according to embodiments of the present invention, for example in Fig. 23.

In embodiments of the present invention the thin film device is comprised in a pressure sensor. In commonly used piezoresistive devices highly doped silicon is used. In operation under pressure the material is deformed which leads to a factor of two in changes of the resistivity. However, for materials capable of undergoing an isostructural phase transition, changes up to a factor 1000 can be seen within the full elastic range of the material as shown in Fig. 19. This can allow a resistive pressure sensor to be provided having a sensitivity which is at least an order of magnitude greater than that of currently available sensors. Note the difference between the factor 1000 mentioned here for the case of the isostructural phase transition in Cr-doped V2O3 at 300K, while a factor 1.000.000 is observed for the non-isostructural IMT transition in the same material at 160K, see Fig 20. These factors are dependent on the chosen material system and can tuned with appropriated materials engineering. In embodiments of the present invention a Cr-doped V2O3 (or any other material capable of controllably undergoing an isostructural phase transition in a thin film device) layer is to be deposited/fabricated in a thin membrane cantilever for instance in a MEMS (micro-electro-mechanical systems) device similar to what has been described above. As the membrane bends under pressure, the lattice parameters of Cr-doped V2O3 change and the resistance of the layer changes as well. One embodiment of a pressure sensor according to the present invention is shown in Fig. 3a (plan view) and 3b (schematic cross section), which shows a pressure sensor having a four wire/four contact (Au) Wheatstone bridge configuration which can be used to measure a pressure difference between areas PI and P2. In this embodiment, the thin film device comprises a substrate 2, a confinement layer of a (CrxFei )2C>3 film 3, and a thin film of Cr-doped V2O3 4. The thin film device is held suspended on a silicon layer on top of a glass substrate and can be displaced in the vertical (z) direction, that is, perpendicular to the plane of the substrate of the thin film device.

In embodiments of the present invention an optical readout of the pressure sensor is possible by measuring the changes in the index of refraction or the extinction coefficient of the thin film layer, properties that are summarized in Fig. 27a and Fig27b. For example, this can be achieved by positioning an optical waveguide close to (for example, next to, on top, below) the thin film layer (for example, a Cr-doped V2O3 layer). As the pressure sensor membrane bends, the index of refraction of the thin film layer changes and this can affect properties of the light passing through nearby optical waveguides, for example the transmission, absorption, reflection, polarisation. Depending on the required sensitivity, in some embodiments the waveguide region is close to, next to, on top or below the thin film layer. However, in some embodiments, one or more substantially optically transparent layers may be provided between the thin film layer and the waveguide.

In embodiments of the present invention a capacitive coupling may be provided. In current MEMS devices, this is typically done such that the distance between two elements is changed and the capacitance between the elements varies as the reciprocal of the distance. Since capacitance can be measured quite accurately, this enables also a good measurement of the distance between elements. In thin film layers according to the present invention, the dielectric constant and / or the capacitance can vary between the metallic and the insulating state by a factor of two or more, much more than the variation, for instance, in piezoresistive highly doped Si sensors. This can allow to decouple deformation under pressure and/or strain (that will induce a change in the dielectric constant) from displacement under pressure and/or strain. The latter mode is the typically used mode of operation in MEMS devices. Embodiments of the present invention can enable more robust pressure sensors to be provided having enhanced sensitivity as compared with sensors based only on the measurement of displacement, for example, the present invention allows to provide an improved pressure sensor based on capacitive readout in which changes are measured in the dielectric constant and / or the capacitance of the thin film layer. As discussed above such changes according to embodiments of the present invention are much greater than those observed in conventional sensors.

Besides enabling a tunable resistance and a tunable capacitance, embodiments of the present invention also allow to provide a thin film device having a tunable inductance as can be derived from Fig. 22. Note that in many known devices where tunable elements are incorporated in MEMS structures, this is done through movable parts where for instance the air gap or the overlap area is modified. Thin film devices according to embodiments of the present invention allow to provide tunable elements simply by applying stress or pressure, which can lead to more robust and more compact systems as moveable parts are not required.

A pressure sensor comprising a thin film device according to embodiments of the present invention may comprise an F resonant circuit provided on the membrane of the pressure sensor. As the membrane bends, the resonance will shift to higher or lower values depending on the sign and magnitude of the bending, providing an alternative pressure change detection mechanism. For example in some embodiments the resonance of the circuit may be monitored as a parameter of the thin film such as pressure or strain is changed.

The invention is not limited to the specific materials specified in the above examples. Note that materials mentioned here for the isostructural case are in many cases the same as those mentioned for the non-isostructural case The substrate may comprise, for example, AI2O3, Si, Ge, GaAs, AIN, GaN, InP, S1O2, SrTiC>3, LiNbC>3, LaTiC>3 etc. cut along any potential crystallographic direction. The buffer layers may comprise, for example, elements, alloys, binary, ternary, etc compounds such as Sn, (Si,Ge,Sn), BaTi03, Cr203, Cr2-yAly03, Cr2-yFey03, Cr2-yTiy03, GaAIAs, InAIAs, GaAIN, (Ca,Sr,Ba)(Ti,Zr,Hf)03, etc. Any material capable of undergoing an isostructural phase transition is a suitable material for the thin film layer. For example, the thin film layer may comprise any of the following materials: PbCrC>3 (whilst under pressure), (BiFe03)i-x(PbTi03)x , Cd2Nb207 , MnO , BiFe03 , LaCu3Fe40i2 , Yblni-xAgxCu4 . The thin film layer may include any material that is known as a Mott insulator or a compound with strong electron correlations. This includes materials such as Ni(S,Se)2 , Ca2 u04, ANi03 with (A=Eu, Sm, Pr, Nd, ...), V02, Nb02, Fe304, La2-xSrxNi04, Pri-xCaxMn03, SmS and the chalcogenides AM4<¾ with (A=Ga, Ge); (M=V, Nb, Ta,Mo); (Q=S, Se, Te).

The invention is not limited to the layer thicknesses specified in the above examples. The buffer layer (or confinement layer) thickness that is pinning the isostructural phase transition may be greater than 1 nm, greater than 10 nm, greater than 50 nm, greater than 100 nm, greater than 500 nm, greater than 1000 nm, greater than 10 μιτι, greater than 100 μιτι. The buffer layer thickness may be less than 10 nm, less than 50 nm, less than 100 nm, less than 500 nm, less than 1000 nm, less than 10 μιτι, less than 100 μιτι. In preferred embodiments the buffer layer thickness is about 100 nm. The buffer layer thickness may be chosen so as to provide a surface (opposite to a surface which is next to the substrate) having a lattice parameter capable of pinning or stabilizing an overlying thin film layer to a desired lattice parameter. The thickness of the thin film layer that is undergoing the isostructural phase transition may be greater than 1 nm, greater than 10 nm, greater than 50 nm, greater than 100 nm, greater than 500 nm, greater than 1000 nm, greater than 10 μιτι, greater than 100 μιτι. The thin film layer thickness may be less than 1 nm (for example, the thin film layer may be a 2D film for example a monolayer of 0.2 nm thickness), less than 10 nm, less than 50 nm, less than 100 nm, less than 500 nm, less than 1000 nm, less than 10 μιτι, less than 100 μιτι. In preferred embodiments the thin film layer thickness is about 100 nm. The thin film layer thickness may be chosen so as to have a desired fixed lattice parameter. In some embodiments wherein a gradient in lattice parameters is desired in the thin film, the thin film thickness may be greater than 1000 nm (for example, if a gradient is desired for lattice parameters between the thermodynamically stable states). The substrate thickness may be greater than 1 nm, greater than 100 nm, greater than 5000 nm, greater than 1000 nm, greater than ΙΟμιτι, greater than 500μιτι, greater than ΙΟΟΟμιτι. For example, a substrate such as an Al203 substrate may be 500 μιτι thick. A substrate such as a Si substrate may be 300 μιτι thick. The substrate layer thickness may be less than 100 nm, less than 5000 nm, less than 10 μιτι, less than ΙΟΟμιτι, less than 500μιτι, less than ΙΟΟΟμιτι. In preferred embodiments the substrate thickness is about 300μιτι. However, other combinations of substrate material and thickness are possible. For instance, for a MEMS device comprising a thin film device according to isostructural embodiments of the present invention, a fabrications step of the MEMS device may comprise etching of the substrate layer over a larger thickness in order that only a thin membrane is left. The thickness of the membrane could be greater than 10 nm, greater than 100 nm, greater than 1000 nm, greater than 10 μιτι, greater than 50 μιτι.

Additional layers may be present in a thin film device according to embodiments of the present invention. For example, a capping layer may be disposed over at least the thin film layer that is undergoing the isostructural phase transition. This example is also similar to the case of the non-isostructural phase transition. The capping layer may allow to protect the thin film layer and/or to maintain desired properties of the thin film layer. In some embodiments, the capping layer may be an active layer, for example may be capable of reacting to a chemical or biomaterial applied to the capping layer by expanding and contracting, thus providing strain to the underlying thin film layer and providing a method of changing one or more physical properties of the thin film layer. The capping layer may additionally or alternatively be capable of reacting to an applied electric field, magnetic field, pressure and/or a change in temperature. The capping layer may comprise a metal, an alloy, a biomolecule, a tissue, and may have a thickness in the range from a monolayer to several micrometer in dependence on the desired function of the capping layer.

The invention is not limited to materials capable of undergoing a metal-insulator isostructural phase transition. The thin film layer comprises any material capable of undergoing an isostructural phase transition. Example of phases include the following: ferroelectric; paraelectric; piezoelectric; pyroelectric; antiferroelectric; ferromagnetic; antiferromagnetic; paramagnetic; piezomagnetic; superconducting; ferroelastic; martensitic, topological transitions; Transitions may be related to changes in ordering, for example those shown in materials exhibiting colossal magnetoresistance, including topological order.Transitions may be related to changes in optical properties for example refractive index, polarization, Kerr effect, Pockels effect, Faraday effect. Note that many of these transitions typically suggest a non-isostructural phase transition. However as stipulated earlier, remaining on one side of the temperature region close to but only above or below the critical temperature of the phase transition, can also be considered as working with an isostructural phase transition for which the description below applies.

Various methods are possible to change the properties of the buffer layer and/or the thin film layer, for example using co-doping which can allow to tune the resistance to much different values, for example by adding Mg. The Cr doping content can be extended to a larger range than that which is possible in the bulk phase while still being able to induce the isostructural transition using the methods described. Another option for modifying the materials is for instance by increasing the amount of Cr doping and counterbalancing this using Ti doping, since it is known that these two dopants shift the isostructural phase transition. It is noted that doping can strongly influence the existence and the onset of structural phase transitions. Other doping strategies can include the addition of more oxygen to counterbalance a wider Cr doping range. Suitable dopants may include one or more of a transition metal, nitrogen, fluorine, sulfur, carbon. This would then also apply generically to all materials that display such isostructural phase transitions.

Embodiments of the present invention can allow heterostructures to be grown on top of the thin film layer which can allow properties of the heterostructures to be tuned using the flexibility in lattice parameters enabled by the present invention. For example, a thin ferroelectric or ferromagnetic layer could be deposited on top of the thin film layer and the properties of the ferroelectric or the ferromagnetic material can be tuned. Changing the lattice parameter of a ferroelectric can change at least one of its fundamental properties, for example the dielectric constant, polarisation, polarisation orientation, coercive field, critical temperature, band gap etc. Changing the lattice parameter of a ferromagnetic can change at least one of its fundamental properties, for example the magnetization, magnetization orientation, coercive field, critical temperature, etc.

In the following section the embodiments described previously corresponding to the non-isostructural phase transition with Fig. 5 to Fig. 8 are now detailed for the isostructural case.

Embodiments of the present invention can allow a broad range of materials to be grown on top of the thin film layer and their properties accordingly varied. For example, multiferroics can be grown. 2D materials can be grown for which the effect of the lattice parameter change may be more substantial than the effect in thin films. Instead of tuning the lattice parameter by engineering the buffer layer, by changing their morphology and/or precise chemical composition, it can be also possible to implement local structures consisting of a different material, which changes its lattice parameter significantly upon an applied external field (e.g. electric field for ferroelectric and piezoelectric materials - see Fig. 5, which illustrates a thin film device 1 according to embodiments of the present invention wherein the buffer layer 3 comprises a piezoelectric material. When a voltage is applied between contacts CI and C2 disposed on the buffer layer 3, a buffer layer lattice parameter and therefore a thin film layer 4 lattice parameter of the material undergoing the isostructural phase transition may change leading to variations in resistivity and optical properties, (change of magnetic field for magnetostrictive and piezomagnetic materials) or by temperature change (for instance pyroelectrics or materials with a relatively high positive or negative thermal expansion coefficient) or by undergoing a structural phase transition with a high volume change. In some embodiments, the substrate may comprise a piezoelectric material, a piezomagnetic material, a pyroelectric material. This can be again a macroscopic structure with large area contacts but it can also be much smaller like nanostructure (dot, wire, flake) on the flat surface (or its negative structure) but it will allow to use this structure as a switch where the buffer layer or substrate can be activated by an external influence.

There is a whole range of materials that could be used here such as for instance the piezo-electrics (PbZr)TiC>3 or BaTiC>3 or the magnetostrictive compounds like Terfenol. Any material that is currently used in the state of the art to induce volume or lattice parameter changes as a function of an external parameter or field can be applied together with this idea.

In embodiments of the present invention the structure of a thin film layer that undergoes the isostructural phase transition may be used in a three terminal device, for example a metal oxide semiconductor field-effect transistor (MOSFET). By applying a voltage across a gate insulator deposited on top of Cr-doped V2O3 layers (or a thin film layer comprising any material capable of undergoing an isostructural phase transition as a thin film layer), it should be possible to extract or inject carriers inside the layer. This would allow the electrical properties to be changed, as is possible in current MOSFETs. This can allow for three terminal devices to be implemented for example, wherein the active (thin) film is a magnetic material and spin transport or magnetic domain configuration can be controlled. Given that the PI phase of Cr-doped V2O3 is a semiconductor, according to embodiments of the present invention a classical semiconductor device technology could be constructed using the thin film devices of the present invention.

In embodiments of the present invention, injecting carriers and causing the thin film layer to be more metallic can allow to change to also the elastic properties. This can allow to provide a device in which the elastic properties can be changed as a function of applied voltage / injected current.

In embodiments of the present invention thin film device can be used in memory applications. For example, the thin film device could be used in a resistive random access memory ( AM) device. In known RRAM devices, the memory function is often generated through the reversible creation/destruction of electrical conductive filaments. By using a thin film according to embodiments of the present invention, for example a thin film device including a thin film comprising Cr-doped V2O3 or any material capable of undergoing an isostructural phase transition as a thin film layer, there is an additional degree of freedom which can allow to change the elastic properties and therefore the resistance of the thin film layer. This behaviour could be tuned to work in a digital manner (on/off) or in an analog manner. In an analog implementation, if the elastic properties are changed gradually, then thin film devices according to the present invention can be used in neuromorphic applications. This is valid for electric, magnetic, as well as photonics implementations, that is, gradual changing of the elastic properties can be used in electric, magnetic and/or photonic implementations.

In piezoelectronic devices piezoelectric materials mechanically coupled to piezoresistive elements are used in transistor structures. According to embodiments of the present invention, a thin film device comprising Cr-doped V2O3 or any material capable of undergoing an isostructural phase transition whether in bulk or as a thin film layer in a device according to embodiments of the present invention could be used in such devices as a replacement for the piezoresistive element. In this case the resistivity is the parameter of interest. It is also possible to construct the optical equivalents assuming that transparent electrodes are used. In this case the index of refraction could be the control parameters. For example, this could be used to construct piezo-optical devices. Note that similar implementations that use the change in capacitance and / or inductance or any of their combinations could be made in multimodal devices.

According to embodiments of the present invention the thin film devices with isostructural transitions can also be used for other novel device concepts such as an optical or capacitive memory elements (M. Kim et al., "A new single element phase transition memory," in Proc. 10th IEEE Conf. Nanotechnol., 2010, pp. 439-442.) where an applied electric field / carrier injection is used to switch reversibly the optical properties or the capacitance of the thin film layer in a three terminal configuration.

Embodiments of the present invention provide a two terminal device which allows to control the state of a region of the thin film layer. Referring to Fig. 6a, a thin film device according to embodiments of the present invention includes a control layer disposed over a first region of the thin film layer that undergoes the isostructural phase transition 204 and first and second electrodes El and E2, respectively, disposed on the thin film layer 204. The control layer is located between the first and second electrodes. The control layer comprises a material which is capable of changing its lattice parameters in response to a current and/or voltage applied to the control layer. For example, the control layer may comprise a piezoelectric material. The control layer may undergo thermal expansion on application of a current/voltage. When no voltage/current is applied to the control layer, the thin film layer 204 is in a metallic state and current can flow between the first and second electrodes. Referring to Fig. 6b, when a voltage or current is applied to the control layer, the lattice parameters of the control layer change and this change is propagated to the thin film layer 204. Thus, the lattice parameters and therefore the physical properties of the thin film layer 204 change, in this example to produce an insulating region (darker shaded region) in a region of the thin film layer 204 which is located below the control layer. A region of the thin film layer 204 then becomes an insulating region. A current path in the thin film layer between electrodes El and E2 now includes an insulating region and current cannot flow. Note that this description is similar to the case of the non-isostructural phase transition and the device layout can be well used for both.

In some embodiments the insulating region may be present when no voltage and/or current is applied to the control layer (thereby providing no current path in the thin film layer between electrodes El and E2) and the metallic region may be present when voltage/current is applied to the control layer (thereby providing a current path in the thin film layer between electrodes El and E2).

Referring to Fig. 7, a plan view of a device according to embodiments of the present invention is shown. This embodiment can equally well be used for the case of the isostructural case as the non-isostructural case and the description is repeated below. The device includes a first control element CI disposed on a first region of the thin film layer 204 and a second control element C2 disposed on a second region of the thin film layer that undergoes the isostructural phase transition 204. The device includes a sense electrode S disposed on the thin film layer 204 between the first control element CI and the second control element C2. The device includes first and second electrodes El and E2 respectively, disposed on the thin film layer 204. The first control element CI is between the first electrode El and the sense electrode 20S. The second control element C2 is between the sense electrode S and the second electrode E2.

The first control element comprises a material capable of undergoing a positive change (an increase) in lattice parameter upon application of a voltage or current or heat (for example, a material having a positive thermal expansion coefficient). The second control element comprises a material capable of undergoing a negative change (a decrease) in lattice parameter upon application of a voltage or current or heat (for example, a material having a negative thermal expansion coefficient).

When heat or voltage or current is applied to the first control element, the first control element will undergo an increase in lattice parameter and pass on this change to a region of the thin film layer 204 which underlies the first control element. In this example, this causes the underlying region of the thin film 204 to become more insulating. When heat or voltage or current is applied to the second control element, the second control element will undergo a decrease in lattice parameter and pass on this change to a region of the thin film layer 204 which underlies the second control element. In this example, this causes the underlying region of the thin film 204 to become more metallic.

A region of the thin film layer 204 which is between the first and second control elements will then exhibit a gradient in lattice parameters and be pinned at a point between the metallic and insulating states of the phase transition. Applying heat or voltage or current to one or both of the first and second control elements can allow to move the transition boundary (the region pinned between the metallic state and the insulating state) laterally, that is, in the plane of the thin film layer 204 in a direction between the control elements. This can allow to provide switch functionality.

The change in position of the transition boundary may be determined by measuring a resistance between the first and second control elements using the first and second electrodes El, E2 and/or using the sense electrode. The transition boundary between metallic and insulating regions may be repeatedly moved laterally. The transition boundary may remain fixed between the first and second control elements, for example as a reflection of the hysteresis typical of a first order transition. Thus the device is capable of functioning as a memory cell having a plurality of memory bits as the transition boundary moves gradually in the plane of the thin film layer 204.

Referring to Fig. 8, control elements can be applied on more than one surface of the thin film layer 204. Note that the description below is again identical to the case of the non-isostructural phase transition. However in the case of the isostructural phase transition, there may be less need for a three dimensional confinement strategy, since the in plane buffer layer already works quite well. Fourth and fifth control elements C4, C5 are located on fourth and fifth regions of the thin film layer. Between the fourth and fifth regions a sixth region of the thin film layer 204 extends in a direction perpendicular to the plane of the substrate. A sixth control element C6 is located on a top face of the sixth region. The fourth control element C4 is between the first electrode El and the sixth control element C6. The fifth control element C5 is between the second electrode E2 and the sixth control element C6. In this embodiment the fourth and fifth control elements comprise a material capable of undergoing a positive change (an increase) in lattice parameter upon application of a voltage or current or heat (for example, a material having a positive thermal expansion coefficient). The sixth control element comprises a material capable of undergoing a negative change (a decrease) in lattice parameter upon application of a voltage or current or heat (for example, a material having a negative thermal expansion coefficient). However, each control element may have a different thermal expansion coefficient which may be less than zero or equal to zero or greater than zero in any direction. Each control element could be composed of several layers each with a different thermal expansion coefficient. This can provide additional structural modulation.

The control elements can activate switching of the thin film layer 204 between states. For example, for the embodiment of Fig. 8 the sixth control element compresses the in-plane lattice parameter of the thin film layer 204 while the fourth and fifth control elements expand the out of plane lattice parameter of the thin film layer or vice versa. The fourth and fifth control elements may be a single control element which wraps around the thin film layer 204 so as to contact the edge of the thin film layer around the sixth region.

Fig. 13 is a flow chart showing a method of manufacturing a thin film device according to embodiments of the present invention valid both for the isostructural as the non-isostructural case. A substrate is provided (step SI). A buffer layer is formed on the substrate (step S2). The thin film layer is formed on the buffer layer (step S3). Steps S2 and S3 may comprise any known thin film deposition process, for example chemical vapour deposition, molecular beam epitaxy, physical vapour deposition, atomic layer deposition, sputtering, laser ablation, sol-gel deposition, direct liquid injection deposition. It is noted that phase transitions exist which require a small amount of energy to activate the transition, that is, to transition between the two thermodynamically stable states. In such cases where the transition enthalpy level is not large the material may not be stable as a function of temperature. However, the key advantage of embodiments of the present invention is that this transition does not occur unintentionally or spontaneously. According to the present invention the strain imposed by the buffer layer allows to controllably prevent the phase transition from occurring unless activated if desired.

Fig. 33 is a perspective view of a SAW device 210 comprising a thin film device 201 according to embodiments of the present invention. Note that the description below fits for both thin film devices that undergo an isostructural or a non-isostructural phase transition. The thin film device 201 comprises the substrate 202, buffer layer 203 and thin film layer 204 as described hereinbefore. A first piezoelectric material region 221 and a second piezoelectric material region 222 are disposed on the second face 208 of the buffer layer, spaced apart by the thin film layer 204 in the x direction which is in the plane of the thin film layer 204. The first and second piezoelectric material regions 221, 222 may be provided by deposition or etching. The piezoelectric material may comprise for example LiNb03. The first piezoelectric material region 221 comprises a first reflector 223 and an input interdigitated transducer (IDT) 224. The second piezoelectric material region 222 comprises a second reflector 225 and an output interdigitated transducer (IDT) 226. The first reflector 223 and the second reflector 225 are spaced apart in the x direction and may comprise any material / layer that affects the reflection of acoustic waves. For example, the first and second reflectors may comprise a metal such as gold or aluminium, or other material capable of reflecting acoustic waves. The input IDT 224 and the output IDT 226 are spaced apart in the x direction and are disposed between the first reflector 223 and the second reflector 225. The input IDT and the output IDT may comprise any conducting material, for example a metal such as gold or aluminium. Surface acoustic waves can be generated in the first piezoelectric material region 221 by the input IDT 224. The first and second reflectors 223, 225 serve to reflect the waves. In some embodiments, the thin film layer and buffer layer combination can be deposited on top of the piezoelectric material, such that the piezoelectric material acts as the substrate of the thin film device, or provided between two piezoelectric material regions or other intermediate position such that the generated acoustic waves are influenced by properties of the thin film layer. Acoustic wave behavior at an interface between two materials can be described by acoustic Snell's law whereby the difference in sound velocity in the two materials will lead to different scattering angles at the interface. The transmission of acoustic waves is also determined by the difference in sound velocities. By modifying the sound velocity in the thin film layer, for example by changing the stress or pressure of the thin film layer, the transmission of acoustic waves within the thin film layer can be modified substantially. A thin film device according to embodiments of the present invention may be comprised in a SAW based device such as filters, resonators, sensors,

gratings, antenna's, phase shifters, reflectors, attenuators and the acoustic wave behavior in the thin film layer can be controlled as described herein.

Fig. 34a and b shows a first MEMS device 230 comprising a thin film device 201 according to embodiments of the present invention. Again this applies for both the isostructural as well as the non-isostructural case. The first MEMS device 230 comprises a base 231 and a support 232 disposed on the base 231 and extending away from the base 231 in the z direction. The support 232 has a first end 233 in contact with the base 231 and a second end 234 spaced apart from the first end 233 and the base 231. The thin film device 201 according to embodiments of the present invention has a first end 241 and a second end 242 spaced apart from the first end 241 in a direction in the plane of the substrate 202. The first end 241 of the thin film device 201 is coupled to the support 232 at the second end 234 of the support 232. The thin film device 201 extends away from the support 232 in a direction which is initially substantially perpendicular to the direction in which the support 232 extends (the x direction). A first metallic element 235 is disposed at the second end 242 of the thin film device 201. A second metallic element 236 is disposed on the base 231 and is spaced apart from the first metallic element 233 in the z direction (the direction in which the support 232 extends). The thin film device 201 and the first and second metallic elements 233, 234 form a cantilever structure. By applying an electrical voltage between the first and second metallic elements 33, 34 the cantilever can bend and properties of the thin film layer of the thin film device 201 can be modified. Other MEMS device configurations are possible wherein a second metal / metal electrode pair is responsible for the actuation and movement. In some embodiments the thin film layer may support a device such as a resistor, a capacitor, an inductor or any combination of these elements into resonators, filters, sensors, etc. The very broad range of values of the different physical properties accessible by the thin film layer can allow to provide devices that can be tuned over a much broader range than currently possible. Depending on the precise layout of the device configuration this could also be used for F applications such as RF switches, RF filters, RF resonators etc.

Referring to Fig. 34b a second MEMS device 250 is shown, the second MEMS device 250 comprises a planar base 251 and first and second supports 252, 253 respectively which extend away from the base 251 in the z direction. The first and second supports 252, 253 are spaced apart in a direction in the plane of the base (the x direction). The first support 252 has a first end 254 coupled to the base 251 and a second end 255 spaced apart from the first end 254 in the z direction. The second support 253 has a first end 256 coupled to the base 251 and a second end 257 spaced apart from the first end 256 in the z direction. A thin film device 201 according to embodiments of the present invention is supported between the second end 255 of the first support 252 and the second end 257 of the second support 254. The thin film device 201 is disposed such that the thin film layer 204 is between the substrate 202 and the base 251. The MEMS device 250 comprises a pillar 258 comprising a deformable material such as a material having a positive thermal expansion coefficient or a piezoelectric material. The pillar 258 is disposed between the first support 252 and the second support 254 and has a first end 259 and a second end 260. The first end 259 of the pillar 258 is coupled to the base 251 and the second end 260 of the pillar 258 contacts the thin film layer 204 of the thin film device 201. Upon deformation of the pillar in the z direction, for example by applying a voltage or current to the pillar, a pressure or stress can be applied to the thin film layer.

According to embodiments of the present invention, a thin film device can be used as a substrate for a material layer, the properties of which can be influenced by changing properties of the thin film layer as described herein. For example, a thin film device comprising a thin film layer wherein the lattice parameter of the thin film layer can be tuned by applying a current to the thin film layer, can be used for example as a strain-providing device for a material layer disposed on the thin film layer.

A thin film device according to embodiments of the present invention may be comprised in a radio frequency ( F) device such an RF MEMS switch, an RF filter, RF capacitor, etc. It can also be used in any resonator type of circuit where resonant frequencies are shifted as a function of deformation.

A thin film device according to embodiments of the present invention may be comprised in an elastic device, that is a device whereby the elastic properties such as Young's modulus, Poisson's ratio, sound velocities, etc. are tunable, such as in a bulk acoustic wave (BAW) or surface acoustic wave (SAW) device as described herein.

A thin film device according to embodiments of the present invention may be comprised in a chemical sensor, for example a biochemical sensor. For example, receptor particles may be provided on the thin film layer, either directly or with an intermediate layer between the thin film layer and the receptor particles. The receptor particles may be exposed to a test substance, such as a test liquid or gas. If the test substance contains molecules or particles capable of binding to the receptor particles, then such particles can bind to the receptor particles and cause an increase in the mass of the thin film device. This mass increase can be detected for example using a cantilever device as described hereinbefore. The adhesion of particles to the receptor particles can cause a change in capacitance, inductance, carrier concentration of the thin film layer, which can be detected in for example an RF MEMS device or a SAW device according to embodiments of the present invention as described hereinbefore.

Modifications

It will be appreciated that many modifications may be made to the embodiments described herein. For example, the buffer layer 203 needs not to be in direct contact with the substrate 202. In some embodiments, one or more intermediate layers are present between the substrate 202 and the buffer

layer 203. The thin film layer 204 needs not to be in direct contact with the buffer layer 203. In some embodiments, one or more intermediate layers are present between the buffer layer 203 and the thin film layer 204.

The intermediate layer(s) may be in an amorphous or polycrystalline or texture phase or another phase which is different to the phase of the buffer layer 203 and/or the phase of the thin film layer 204, provided that enough of the desired phase is available to transfer / control the state of the thin film. For example, a thin disordered interface/intermediate layer between the buffer layer 203 and the thin film layer 204 may not completely block this transfer of "structural information / lattice deformation".

In some embodiments there may be a gradual relaxation between the buffer lattice parameter and the thin film lattice parameter -for example a lattice parameter variation as a function of the thickness of the thin film - but for a majority part of the thin film thickness, the present invention allows to control the thin film lattice parameter in a relevant region within and outside the lattice parameter range of the two stable structural states.

In some embodiments the buffer layer may be a modified version of the thin film layer whereby the lattice parameters of the buffer layer have been changed from the standard expected values of the thin film layer. That is, the buffer layer may comprise the same material as the thin film layer and may be of a different structural form, such as comprising defects or dopants, being of a different crystalline form, etc. This can be achieved for instance through poor quality growth at suboptimal temperature and pressure, the introduction of many defects, the interplay with thermal expansion coefficients, doping, bombardment with energetic species, implantations, diffusion, etc.

A thin film device according to embodiments of the present invention may be comprised in a resonator, chemical sensor, accelerometer, gyroscope, switch etc. A thin film device according to embodiments of the present invention may be comprised in an integrated circuit.