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[Parsed Query:ID:"WO2011140541"
, No hits:1
, QUERY:ID:"WO2011140541" STEMMING:null OFFICES:
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PATENTSCOPE
1. (WO2011140541) METHOD OF 1/F NOISE LEVEL REDUCTION AND MANIPULATION IN SEMICONDUCTOR BASED DEVICES
PCT Biblio. Data
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Pub. No.:
WO/2011/140541
International Application No.:
PCT/US2011/035686
Publication Date:
10.11.2011
International Filing Date:
09.05.2011
IPC:
H01L 21/8238
(2006.01),
H01L 21/336
(2006.01),
H01L 29/78
(2006.01),
H01L 31/101
(2006.01)
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8238
Complementary field-effect transistors, e.g. CMOS
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or A
III
B
V
compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
08
in which radiation controls flow of current through the device, e.g. photoresistors
10
characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
101
Devices sensitive to infra-red, visible or ultra-violet radiation
Applicants:
THE GEORGE WASHINGTON UNIVERSITY
[US/US]; Rice Hall, Suite 601 2121 I Street, NW Washington, DC 20052 (US)
(For All Designated States Except US)
.
GASPARYAN, Ferdinand, V.
[AM/AM]; (AM)
(For US Only)
.
ASRIYAN, Hayk, V.
[AM/AM]; (AM)
(For US Only)
.
MELKONYAN, Slavik, V.
[AM/AM]; (AM)
(For US Only)
.
KORMAN, Can, E.
[US/US]; (US)
(For US Only)
Inventors:
GASPARYAN, Ferdinand, V.
; (AM).
ASRIYAN, Hayk, V.
; (AM).
MELKONYAN, Slavik, V.
; (AM).
KORMAN, Can, E.
; (US)
Agent:
WEISSMAN, Peter, S.
; Blank Rome LLP 600 New Hampshire Ave., NW Washington, DC 20037 (US)
Priority Data:
61/332,408
07.05.2010
US
Title
(EN)
METHOD OF 1/F NOISE LEVEL REDUCTION AND MANIPULATION IN SEMICONDUCTOR BASED DEVICES
(FR)
PROCÉDÉ DE RÉDUCTION ET DE MANIPULATION DU NIVEAU DE BRUIT 1/F DANS DES DISPOSITIFS À SEMI-CONDUCTEURS
Abstract:
(EN)
The present invention provides, in one embodiment, a method of 1/f noise level reduction and manipulation for broad class of semiconductor based devices. The method comprises selection of constituent elements of a semiconductor based device in such a way to provide fast dynamics for the decay (damp) of a non-equilibrium state of dynamic equilibrium between interacting electrons and phonons systems in semiconductor media where electron signal is processed by a device.
(FR)
Dans un mode de réalisation, l'invention concerne un procédé de réduction et de manipulation du niveau de bruit 1/f pour une grande diversité de dispositifs à semi-conducteurs. Le procédé selon l'invention consiste à sélectionner des éléments constitutifs d'un dispositif à semi-conducteurs, de sorte à fournir une dynamique rapide pour l'amortissement d'un état de non équilibre dynamique entre des systèmes d'électrons et de phonons en interaction dans des supports semi-conducteurs dans lesquels un signal électronique est traité par un dispositif.
Designated States:
AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Org. (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (EAPO) (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (OAPI) (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language:
English (EN)
Filing Language:
English (EN)